LTC1750 14-Bit, 80Msps Wide Bandwidth ADC

The LTC®1750 is an 80Msps, 14-bit A/D converter designed for digitizing wide dynamic range signals up to frequencies of 500MHz. The input range of the ADC can be optimized with the on-chip PGA sample-and-hold circuit and flexible reference circuitry.

The LTC1750 has a highly linear sample-and-hold circuit with a bandwidth of 500MHz. The SFDR is 82dB with an input frequency of 250MHz. Ultralow jitter of 0.12psRMS allows undersampling of IF frequencies with minimal degradation in SNR. DC specs include ±3LSB INL and no missing codes.

The digital interface is compatible with 5V, 3V, 2V and LVDS logic systems. The ENC and ENC inputs may be driven differentially from PECL, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ENC and ENC inputs may also be driven by a sinusoidal signal without degrading performance. A separate output power supply can be operated from 0.5V to 5V, making it easy to connect directly to any low voltage DSPs or FIFOs.

The 48-pin TSSOP package with a flow-through pinout simplifies the board layout

产品特点 Features Sample Rate: 80Msps 500MHz Full Power Bandwidth S/H Direct IF Sampling Up to 500MHz PGA Front End (2.25VP-P or 1.35VP-P Input Range) 75.5dB SNR and 90dB SFDR (PGA = 0) 73dB SNR and 90dB SFDR (PGA = 1) No Missing Codes Single 5V Supply Power Dissipation: 1.45W Two Pin Selectable Reference Values Two’s Complement or Offset Binary Outputs Out-of-Range Indicator Data Ready Output Clock Pin-for-Pin Family 48-Pin TSSOP Package 封装	应用 Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems MRI Tomography 典型应用图

产品特点 Features

Sample Rate: 80Msps
500MHz Full Power Bandwidth S/H
Direct IF Sampling Up to 500MHz
PGA Front End (2.25VP-P or 1.35VP-P Input Range)
75.5dB SNR and 90dB SFDR (PGA = 0)
73dB SNR and 90dB SFDR (PGA = 1)
No Missing Codes
Single 5V Supply
Power Dissipation: 1.45W
Two Pin Selectable Reference Values
Two’s Complement or Offset Binary Outputs
Out-of-Range Indicator
Data Ready Output Clock
Pin-for-Pin Family
48-Pin TSSOP Package

封装

应用

Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
MRI
Tomography

典型应用图

LTC1750 订购信息和价格参考Package Variations and Pricing

器件型号	封装	引脚	温度	价格 (以 1 ~ 99 片为批量)	价格 (以 1000 片为批量) *
LTC1750CFW	TSSOP	48	C	$10.80	$9.30
LTC1750CFW#PBF	TSSOP	48	C	$10.80	$9.30
LTC1750CFW#TR	TSSOP	48	C		$9.40
LTC1750CFW#TRPBF	TSSOP	48	C		$9.40
LTC1750IFW	TSSOP	48	I	$12.70	$10.95
LTC1750IFW#PBF	TSSOP	48	I	$12.70	$10.95
LTC1750IFW#TR	TSSOP	48	I		$11.05
LTC1750IFW#TRPBF	TSSOP	48	I		$11.05

LTC1750 演示电路板

器件型号	描述
DC699A-B	LTC1750CFW Demoboard \| 14-Bit 80MSPS ADC, Requires DC718

LTC1750 Companion Boards

器件型号	描述
DC718C	USB Data Acquisition Controller, for QuikEval -II Evaluation Kits

LTC1750 数据手册及相关资料下载

数据手册( 英文) : LTC1750 - 14-Bit, 80Msps Wide Bandwidth ADC .PDF
可靠性数据 : R479 Reliability Data .PDF
产品选型卡 : Differential Amplifiers/High Speed ADC Drivers .PDF
LT Journal: Dec 2002 A 14-Bit ADC that is Both Fast and Low Noise.PDF