GTL2005PW Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator

The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus.

The direction pin (DIR) allows the part to function as either a GTL-to-TTL sampling receiver or as a TTL-to-GTL interface.

The GTL2005 LVTTL interface is tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS outputs.

The GTL2005 Vref linearity degrades below 0.8 V (see Section 10.1). If the application allows, use the GTL2014, otherwise more closely review noise margins

产品特点 Features
  • Operates as a quad GTL/GTL+ sampling receiver or as a LVTTL/TTL to GTL/GTL+ driver
  • Quad bidirectional bus interface
  • 3.0 V to 3.6 V operation with 5 V tolerant LVTTL I/O
  • Live insertion/extraction permitted
  • Latch-up protection exceeds 500 mA per JESD78
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-CC101
  • Package offered: TSSOP14
产品实物图
GTL2005PW 产品实物图
封装
型号 可订购的器件编号 订购码 (12NC) 产品状态 封装
GTL2005PW 9352 638 13118 GTL2005PW,118 量产 TSSOP14 (SOT402-1)
GTL2005PW 9352 638 13112 GTL2005PW,112 量产 TSSOP14 (SOT402-1)
GTL2005PW/DG 9352 858 97118 GTL2005PW/DG,118 量产 TSSOP14 (SOT402-1)
订货和供应
型号 订购码 (12NC) 可订购的器件编号 化学成分
GTL2005PW 9352 638 13118 GTL2005PW,118 GTL2005PW
GTL2005PW 9352 638 13112 GTL2005PW,112 GTL2005PW
GTL2005PW/DG 9352 858 97118 GTL2005PW/DG,118 GTL2005PW/DG
GTL2005PW 技术支持
档案名称 标题 类型 格式
GTL2005PW Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Data sheet pdf
AN10441 Level shifting techniques in I2C-bus design Application note pdf
AN10216 I2C manual Application note pdf
AN10145 AN10145 Bi-directional low voltage translators Application note pdf
75017424 NXP I2C-bus solutions 2013: Smart, simple solutions for the 12 most common design concerns Leaflet pdf
UM10204 I2C-bus specification and user manual User manual pdf
UM10206 I2C Demonstration Board 2005-1 Quick Start Guide User manual pdf