TDA19971 Single HDMI 1.4b receiver with digital processing

The TDA19971 HDMI receiver proposes one HDMI input and standard video bus output optimized for STB and PVR system integration. The TDA19971 offers High Definition (HD) video resolutions up to 1080 p 50/60 or WUXGA and HD audio formats up to 8 channels such as DTS HD and Dolby True HD while keeping advanced sleep modes power management.

This chip includes HDCP1.4 engine with pre-programmed keys stored into an internal non-volatile memory to provide highly secured solution and simplify manufacturing process.

This chip features several HDMI 1.4b options such as 3D format up to 1080 p 50/60, Deep Colors up to 36-bit and extended colorimetry. The TDA19971 integrates 8 kV system ESD protections and non volatile memory for EDID storage to minimize BOM.

An optimized auto-adaptative equalizer increases TDA19971 robustness to long cable and reduced quality signals. The TDA19971 is delivered with software drivers for Linux, Windows and RTOS easy to implement and to configure.

To build a complete system with the TDA19971, refer to the corresponding application notes. Evaluation platforms and user guide are available on request to NXP support.

产品特点 Features

HDMI 1.4b receiver (1 input), DVI 1.0, CEA-861-D standards, up to the HDMI frequency of 235 MHz:

  • Auto-adaptative equalizer
  • Deep Color (30 bits per pixel and 36 bits per pixel)
  • HPD 4 V level for HEAC feature, HPD automatic management
  • CEC feature
  • Embedded EDID non-volatile memory: EDID readable with +5 V from the source
  • DDC-bus inputs: 5 V tolerant and bit rate up to 400 kbit/s, support threshold VIL = 1.5 V (30 % of 5 V) and VIH = 2.3 V (70 % of 3.3 V)
  • All HDTV formats up to 1920 x 1080 p at 50/60 Hz with support for reduced blanking
  • 3D formats including all primary formats up to 1920 x 1080 p at 30 Hz Frame Packing and 1920 x 1080 p at 60 Hz Side-by-Side and Top-and-Bottom
  • PC formats up to UXGA (1600 x 1200 p at 60 Hz) and WUXGA (1920 x 1200 p at 60 Hz)

HDCP:

  • Repeater capability (requires software driver)
  • Embedded non-volatile memory storage of HDCP keys

Video:

  • Integrated downsampling-by-two with selectable filters on Cb and Cr channels for 4 : 2 : 2 mode
  • Programmable color space conversion: RGB or YCbCr input signal into YCbCr or RGB output
  • Color gamut metadata packet with interrupt on each update, readable via the I²C-bus
  • Internal 36-bit video processing
  • Video output single or dual rate for video interface
  • Frame and field detection for interlaced video signal
  • Sync timing measurements for automatic format recognition
  • Improved system for measurements of blanking and video active area allowing an accurate recognition of PC and TV formats
  • Output formats: RGB 4 : 4 : 4, YCbCr 4 : 4 : 4, YCbCr 4 : 2 : 2 semi-planar based on the ITU-R BT.601 standard and YCbCr 4 : 2 : 2 ITU-R BT.656
  • 8-bit, 10-bit or 12-bit per component output formats selectable using the I²C-bus and output mapping fully programmable
  • Internal video and audio patterns generator

Audio:

  • Audio clock generation from Xtal: 128 fs, 256 fs, 512 fs and Fs = 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 172.4 kHz, 192 kHz
  • Up to four S/PDIF or I²S-bus outputs (8 channels) at a sampling rate up to 192 kHz with IEC 60958/IEC 61937 stream
  • HBR streams (compatible with DTS-HD master audio and Dolby TrueHD up to 8 channels due to HBR packet for stream with a frame rate up to 768 kHz) support
  • Improved audio clock generation using an external reference clock
  • Embedded audio pop noise remover
  • S/PDIF or I²S-bus up to 8 channels

General:

  • Embedded ESD protection according to IEC 61000-4-2 class 4 (±8 kV contact, ±15 kV air)
  • Controllable using the I²C-bus; 5 V tolerant and bit rate up to 400 kbit/s
  • I²C-bus adjustable timing of video port
  • LV-TTL outputs
  • Low-power mode
  • CMOS process
  • 1.8 V and 3.3 V power supplies
  • 0 °C to 70 °C temperature range
  • Packages: HVQFN72 10 mm x 10 mm pitch 0.5 mm (other package option could be considered on request)
  • Low power: clock gating on each video block, optional 2.5 V supply on audio/video output instead of 3.3 V for SoC
应用
  • Projector
  • STB
  • Tablet
  • Monitor
  • AVR/VCR/AVN
  • Video conference
  • Media box
  • ADSL boxes
  • HDMI/HDCP
产品实物图
TDA19971 产品实物图
封装
型号 可订购的器件编号 订购码 (12NC) 产品状态 封装
TDA19971AHN/C1 9352 974 53551 TDA19971AHN/C1,551 量产 HVQFN72 (SOT813-4)
TDA19971AHN/C139 9353 009 68551 TDA19971AHN/C139E 量产 HVQFN72 (SOT813-4)
TDA19971AHN/C139 9353 009 68557 TDA19971AHN/C139K 量产 HVQFN72 (SOT813-4)
TDA19971AHN/C139 9353 009 68518 TDA19971AHN/C139Y 量产 HVQFN72 (SOT813-4)
TDA19971BHN/C1 9352 974 54557 TDA19971BHN/C1,557 量产 HVQFN72 (SOT813-4)
TDA19971BHN/C1 9352 974 54551 TDA19971BHN/C1,551 量产 HVQFN72 (SOT813-4)
TDA19971BHN/C1 9352 974 54518 TDA19971BHN/C1,518 量产 HVQFN72 (SOT813-4)
订货和供应
型号 订购码 (12NC) 可订购的器件编号 化学成分
TDA19971AHN/C1 9352 974 53551 TDA19971AHN/C1,551 TDA19971AHN/C1
TDA19971AHN/C139 9353 009 68551 TDA19971AHN/C139E TDA19971AHN/C139
TDA19971AHN/C139 9353 009 68557 TDA19971AHN/C139K TDA19971AHN/C139
TDA19971AHN/C139 9353 009 68518 TDA19971AHN/C139Y TDA19971AHN/C139
TDA19971BHN/C1 9352 974 54557 TDA19971BHN/C1,557 TDA19971BHN/C1
TDA19971BHN/C1 9352 974 54551 TDA19971BHN/C1,551 TDA19971BHN/C1
TDA19971BHN/C1 9352 974 54518 TDA19971BHN/C1,518 TDA19971BHN/C1
TDA19971 技术支持
档案名称 标题 类型 格式
AN10441 Level shifting techniques in I2C-bus design Application note pdf
AN10216 I2C manual Application note pdf
AN10145 AN10145 Bi-directional low voltage translators Application note pdf
75017424 NXP I2C-bus solutions 2013: Smart, simple solutions for the 12 most common design concerns Leaflet pdf
UM10204 I2C-bus specification and user manual User manual pdf
UM10206 I2C Demonstration Board 2005-1 Quick Start Guide User manual pdf