TJA1029T LIN 2.2A/SAE J2602 transceiver with TXD dominant timeout

The TJA1029 is the interface between the Local Interconnect Network (LIN) master/slave protocol controller and the physical bus in a LIN network. It is primarily intended for in-vehicle subnetworks using baud rates up to 20 kBd and is compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and SAE J2602. The TJA1029 is pin-compatible with the TJA1020, TJA1021, TJA1022 and TJA1027.

The protocol controller generates the transmit data stream. The TJA1029 converts the data stream into an optimized bus signal shaped to minimize ElectroMagnetic Emissions (EME). The LIN bus output pin is pulled HIGH via an internal termination resistor. For a master application, connect an external resistor in series with a diode between pin VBAT and pin LIN. The receiver detects a receive data stream on the LIN bus input pin and transfers it via pin RXD to the microcontroller.

Power consumption is very low in Sleep mode. However, the TJA1029 can still be woken up via pins LIN and SLP_N. An integrated TXD dominant time-out function prevents the bus being driven to a permanent dominant state

产品特点 Features

General

Protection

封装
型号 订购码 (12NC) 可订购的器件编号 产品状态 封装
TJA1029T 9352 979 62118 TJA1029T,118 量产 SO8 (SOT96-1)
订货和供应
型号 订购码 (12NC) 可订购的器件编号 化学成分
TJA1029T 9352 979 62118 TJA1029T,118 TJA1029T
TJA1029T 技术支持
档案名称 标题 类型 格式
TJA1029T LIN 2.2A/SAE J2602 transceiver with TXD dominant timeout Data sheet pdf
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