MC100EP29:ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset
The MC10/100EP29 is a dual master-slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. The MC10/100EP29 is functionally equivalent to the MC10/100EL29. Data enters the master latch when the clock is LOW and transfers to the slave upon a positive transition on the clock input.
技术特性
- Maximum Frequency > 3 GHz Typical
- 500 ps Typical Propagation Delays
- PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
- Open Input Default State
- Safety Clamp on Inputs
- These are Pb−Free Devices
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
MC100EP29DT |
Active, Not Rec |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
TSSOP-20 |
948E-02 |
1 |
Tube |
75 |
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MC100EP29DTG |
Active |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
TSSOP-20 |
948E-02 |
1 |
Tube |
75 |
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MC100EP29DTR2 |
Active, Not Rec |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
TSSOP-20 |
948E-02 |
1 |
Tape and Reel |
2500 |
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MC100EP29DTR2G |
Active |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
TSSOP-20 |
948E-02 |
1 |
Tape and Reel |
2500 |
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MC100EP29MNG |
Active |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
QFN-20 |
485E-01 |
1 |
Tube |
92 |
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MC100EP29MNTXG |
Active |
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ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset |
QFN-20 |
485E-01 |
1 |
Tape and Reel |
3000 |
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