MC10EP29:3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset

The MC10/100EP29 is a dual master-slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. The MC10/100EP29 is functionally equivalent to the MC10/100EL29. Data enters the master latch when the clock is LOW and transfers to the slave upon a positive transition on the clock input.

技术特性
  • Maximum Frequency > 3 GHz Typical
  • 500 ps Typical Propagation Delays
  • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • These are Pb−Free Devices
封装图 MARKING DIAGRAM

MC10EP29 封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC10EP29DT Active, Not Rec 
Pb-free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset TSSOP-20 948E-02 1 Tube 75  
MC10EP29DTG Active
Pb-free
Halide free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset TSSOP-20 948E-02 1 Tube 75  
MC10EP29DTR2 Active, Not Rec 
Pb-free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset TSSOP-20 948E-02 1 Tape and Reel 2500  
MC10EP29DTR2G Active
Pb-free
Halide free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset TSSOP-20 948E-02 1 Tape and Reel 2500  
MC10EP29MNG Active
Pb-free
Halide free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset QFN-20 485E-01 1 Tube 92  
MC10EP29MNTXG Active
Pb-free
Halide free
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset QFN-20 485E-01 1 Tape and Reel 3000  
数据资料DataSheet下载
概述 文档编号/大小 版本
3.3 V / 5.0 V ECL Dual Differential Clock/Data D Flip-Flop With Set and Reset MC10EP29-D(417.0kB) 1