NBSG53A:2.5 V / 3.3 V Selectable Differential Clock / Data D Flip-Flop / Clock Divider with Reset and OLS
The NBSG53A is a multi-function differential D flip-flop (DFF) or fixed divide by 2 (DIV/2) clock generator. This is part of the GigaComm family of high performance Silicon Germanium products. A strappable control pin is provided to select between the two functions. The device is housed in a low profile 4x4 mm 16-pin Flip-Chip BGA (FCBGA) package.
技术特性
- Maximum Input Clock Frequency (DFF) > 8 GHz Typical
- Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical
- 210 ps Typical Propagation Delay (OLS = FLOAT)
- 45 ps Typical Rise and Fall Times (OLS = FLOAT)
- Selectable Output Level (0 V, 200 mV, 400 mV, 600 mV, or 800 mV Peak-to-Peak Output)
- 50 Ω Internal Input Termination Resistors on all Differential Input
- DIV/2 Mode (Active with Select Low)
- D Flip Flop Mode (Active with Select High)
- Selectable Swing PECL Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
- Selectable Swing NECL Output with NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
NBSG53AMNG |
Active |
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2.5 V / 3.3 V Selectable Differential Clock / Data D Flip-Flop / Clock Divider with Reset and OLS |
QFN-16 |
485G-01 |
1 |
Tube |
123 |
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NBSG53AMNHTBG |
Active |
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2.5 V / 3.3 V Selectable Differential Clock / Data D Flip-Flop / Clock Divider with Reset and OLS |
QFN-16 |
485G-01 |
1 |
Tape and Reel |
100 |
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NBSG53AMNR2G |
Active |
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2.5 V / 3.3 V Selectable Differential Clock / Data D Flip-Flop / Clock Divider with Reset and OLS |
QFN-16 |
485G-01 |
1 |
Tape and Reel |
3000 |
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