M48Z512BV 3.3V,4兆位( 512千比特× 8 )ZEROPOWER ?的SRAM
The M48Z512BV ZEROPOWER? RAM is a nonvolatile, 4,194,304-bit static RAM organized as 524,288 words by 8 bits. The devices combine an internal lithium battery, a CMOS SRAM and a control circuit in a plastic, 32-pin DIP module.
M48Z512BV 技术特性:
- Integrated, ultra-low power SRAM, power-fail control circuit, and battery
- Conventional SRAM operation; unlimited WRITE cycles
- 10 years of data retention in the absence of power
- Automatic power-fail chip deselect and WRITE protection
- 3.0 to 3.6 V operation
– 2.9 V power-fail deselect - Pin and function compatible with JEDEC standard 512 K x 8 SRAMs
- PMDIP32 is an ECOPACK? package
- For 5 V applications, refer to the M48Z512A
M48Z512BV 技术支持与电子电路设计开发资源下载
- M48Z512BV 数据手册DataSheet下载.PDF
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