M74HCT138 3 to 8 Line Decoder (Inv.)

The M74HCT138 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate C2MOS technology.

If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems.

All inputs are equipped with protection circuits against static discharge and transient excess voltage

技术特性

HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V
LOW POWER DISSIPATION: Icc = 4μA(MAX.) at TA=25°C
COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX)
SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)
BALANCED PROPAGATION DELAYS: tPLH tPHL
PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138

M74HCT138 订购信息

订购型号	产品状态	美金价格	数量	封装	包装形式	温度范围	材料声明
M74HCT138TTR	Active		1000	TSSOP 16	Tape And Reel		M74HCT138TTR
M74HCT138RM13TR	Active		1000	SO-16	Tape And Reel		M74HCT138RM13TR
M74HCT138B1R	Active		1000	PDIP 16	Tube		M74HCT138B1R

DATASHEET

描述	版本	大小
M74HCT138 : 3 to 8 line decoder (inverting)	1	280KB