技术特性

• High-performance 64 MHz e200z0h CPU
  • 32-bit Power Architecture®book E CPU
  • Up to 60 DMIPs operation
  • Variable length encoding (VLE)
• Memory
  • Up to 512 KB Code Flash with ECC
  • 64 KB Data Flash SRAM with ECC
  • Up to 48 KB SRAM with ECC
  • 8-entry memory protection unit (MPU)
• Interrupts
  • 16 priority levels
  • Non-maskable interrupt (NMI)
  • Up to 34 external interrupts incl. 18 wakeup lines
• GPIO: 45(LQFP64), 75(LQFP100), 123(LQFP144)
• Timer units
  • 6-channel 32-bit periodic interrupt timers
  • 4-channel 32-bit system timer module
  • Software watchdog timer
  • Real-time clock timer
• 16-bit counter time-triggered I/Os
  • Up to 56 channels with PWM/MC/IC/OC
  • ADC diagnostic via CTU
• Communications interface
  • Up to 6 FlexCAN (2.0B active) with 64-message objects each
  • Up to 4 LINFlex/UART
  • 3 DSPI / I²C
• Single 5 V or 3.3 V supply
• 10-bit A/D converter with up to 36 channels
  • Extendable to 64 channels
  • Individual conversion registers
  • Cross triggering unit (CTU)
• Dedicated diagnostic module for lighting
  • Advanced PWM generation
  • Time-triggered diagnostic
  • PWM-synchronized ADC measurements
• Clock generation
  • 4 to 16 MHz main oscillator
  • 32 kHz auxiliary oscillator
  • 16 MHz internal RC oscillator
  • 128 kHz intern. RC oscillator for low power
  • Software-controlled FMPLL
  • Clock monitoring unit (CMU)
• Exhaustive debugging capability
  • Nexus1 on all devices
  • Nexus2+ available on emulation package (LBGA208)
• Low power capabilities
  • Ultra-low power standby with RTC, SRAM and CAN monitoring
  • Fast wakeup schemes
• Operating temp. range up to -40 to 125 °C

功能框图