技术特性

• ST21Y144 major applications include:
  • Mobile communications (GSM and CDMA)
  • Java applications
• Hardware features
  • Enhanced 8/16-bit CPU core with 16 MBytes linear addressable memory
  • 400 Kbytes User ROM
  • 8 Kbytes User RAM
  • 144 Kbytes User EEPROM including 64 Bytes User OTP area:
    • Highly reliable CMOS EEPROM submicron technology
    • 10-year data retention
    • 500,000 Erase/Write cycles endurance typical at 25°C
    • 1 to 64 Bytes Erase or Program in 1.5 ms
  • Asynchronous Receiver Transmitter supporting ISO 7816-3 T=0 and T=1 protocols
  • Two 8-bit timers with interrupt capability
  • 1.8V, 3V and 5V supply voltage ranges
  • External clock frequency from 1 up to 7.5 MHz
  • High performance provided by:
    • CPU clock frequency up to 22 MHz
    • External clock multiplier (2x, 3x, and 4x)
  • Current consumption complies with GSM specifications
  • Power-saving Standby mode
  • Contact assignment compatible ISO 7816-2
  • ESD protection greater than 4 kV (HBM)
• Security features
  • Monitoring of environmental parameters
  • Protection against faults
  • ISO 3309 CRC calculation block
  • Cryptographic performances(1):
    • Triple DES (with keys loaded): 9.3 µs
    • Single DES (with keys loaded): 3.1 µs
  • True Random Number Generator
  • Unique serial number on each die
  • Hardware DES accelerator

功能框图