技术特性

• Fully integrated narrow-band power line networking system-on-chip
• High performing PHY processor with embedded turn-key firmware for spread frequency shift keying (S-FSK) modulation:
  • Programmable bit rate up to 2.4 Kbps (@ 50 Hz)
  • 1 Hz step programmable carriers up to 148.5 kHz
  • Signal to noise ratio estimation
  • Received signal strength indication
• Protocol engine embedding:
  • IEC61334-5-1 PHY and MAC layers
  • Alarm management
• On chip peripherals:
  • Host controller UART interface
• Fully integrated analog front end:
  • ADC and DAC
  • PGA with automatic gain control for high receiving sensitivity
  • High linearity modulated signal generation
• Fully integrated single-ended power amplifier for line driving
  • Up to 1 A rms, 14 V p-p output
  • Configurable Active filtering topology
  • Very high linearity
  • Embedded temperature sensor
  • Current control feature
• 8 to 18 V power amplifier supply
• 3.3 V or 5 V digital I/O supply
• Integrated 5 V and 1.8 V linear regulators for AFE and digital core supply
• Mains zero crossing synchronization
• Suitable for EN50065 and FCC part 15 compliant applications
• VFQFPN48 package with exposed pad
• -40 °C to +85 °C temperature range

功能框图