STEVAL-PSQ001V1 Power management for CPU, FPGA and memory based on the PM6680A
The main purpose of this evaluation board is to show basic principles used for design of the power supply and to give users a working prototype for testing and daily use. The trend in recent years in the supply of MCUs, CPUs, memories, FPGAs etc. is to reduce the supply voltage, increase supply current and provide various voltage levels for different devices in one platform. A typical example of this is the FPGA. FPGAs contain core parts which operate with low level voltage, interface parts placed between the core and the output, system parts, etc. It is important to note that each family of parts has a slightly different voltage level and the trend is toward decreasing voltage for each new family. The lowest operating voltage currently is 1 V, and this can be expected to drop to 0.9 V or 0.8 V in the near future. The situation is similar with other parts of digital solutions. Typically, the main CPU, memory, and interfaces require different supply voltage levels.
Low operating voltage also bring another challenge - transient. Digital devices are typically sensitive to voltage level. If voltage drops below or crosses over established limits, the device is reset. This limit is typically ± 3 or 5 %. On the other hand, digital device consumption can change very fast (approx. several amps in several hundred nanoseconds). The power supply must be capable of reacting very quickly with a minimum of over/under voltage, especially in cases where very low voltage output is required.
There is additional stress placed on power supplies in digital applications for industrial use.
The industrial standard bus is 24 V, but this voltage fluctuates and the maximum required input voltage level can be up to 36 V. Additional surge protection is also mandatory for power supply input in industrial applications. The purpose of this evaluation board is to address all of required parameters outlined above. This means satisfying industrial input requirements (operating voltage of up to 36 V) and generating several output voltages for middle power applications (up to several amps). The main output voltage level can be set easily.
技术特性
- Input: 5 - 36 VDC, surge protection
- Output voltages:
- Output1 (Vcore) selectable from: 0.9, 1.0, 1.2, 1.5, 1.8 or 2.5 V, 4 A continuously (6 A peak), tolerance: 3%
- Output2 (Vi/o) selectable from: 1.0, 1.2, 1.5, 1.8, 2.5 V or 3.3 V, 2 A continuously (3 A peak), tolerance: 3%
- Output3 Vsys: 3.3 V 0.4 A (0.8 A peak), tolerance: 4%
- Output3 Vaux: 2.5 V, 0.4 A, tolerance: 2%
- Analog 5: 5 V, 0.8 A, tolerance: 4%
- Analog 3.3 V: 3.3 V, 0.15 A, tolerance: 2%
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STEVAL-PSQ001V1 订购信息
| 订购型号 |
产品状态 |
美金价格 |
数量 |
封装 |
包装形式 |
温度范围 |
材料声明 |
| STEVAL-PSQ001V1 |
Active |
|
1000 |
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DATA BRIEF
| 描述 |
版本 |
大小 |
| STEVAL-PSQ001V1 : Power management for CPU, FPGA and memory based on the PM6680A |
1 |
205KB |
APPLICATION NOTES
| 描述 |
版本 |
大小 |
| AN3222: Demonstration board user guidelines for low-side current sensing with the TS507 operational amplifier |
1 |
615KB |
BILL OF MATERIALS
SCHEMATIC PACKS
PCB LAYOUTS
