技术特性

• Core: ARM 32-bit Cortex™-M4F CPU (72 MHz max), single-cycle multiplication and HW division, DSP instruction with FPU (floating-point unit) and MPU (memory protection unit)
• Memories
  • 64 to 256 Kbytes of Flash memory
  • 32 Kbytes of SRAM with HW parity check
• CRC calculation unit
• Reset and power management
  • Supply: VDD= 1.8 V +/- 8%, VDDA= 1.65 - 3.6 V
  • External POR pin
  • Low power modes: Sleep, Stop
• Clock management
  • 4 to 32 MHz crystal oscillator
  • 32 kHz oscillator for RTC with calibration
  • Internal 8 MHz RC with x16 PLL option
  • Internal 40 kHz oscillator
• Up to 84 fast I/Os
  • All mappable on external interrupt vectors
  • Up to 45 I/Os with 5 V tolerant capability
• 12-channel DMA controller
• One 12-bit, 1.0 μs ADC (up to 16 channels)
  • Conversion range: 0 to 3.6 V
  • Separate analog supply from 2.4 up to 3.6
• Up to three 16-bit Sigma Delta ADC
  • Separate analog supply from 2.2 to 3.6 V, up to 21 single/ 11 diff channels
• Up to three 12-bit DAC channels
• Two fast rail-to-rail analog comparators with programmable input and output with analog supply from 1.65 to 3.6 V
• Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touchsensors
• 17 timers
  • Two 32-bit timer and three 16-bit timers with up to 4 IC/OC/PWM or pulse counter
  • Two 16-bit timers with up to 2 IC/OC/PWM or pulse counter
  • Four 16-bit timers with up to 1 IC/OC/PWM or pulse counter
  • Independent and system watchdog timers
  • SysTick timer: 24-bit downcounter
  • Three 16-bit basic timers to drive the DAC
• Calendar RTC with Alarm and periodic wakeup from Stop
• Communication interfaces
  • CAN interface (2.0B Active)
  • Two I²C interfaces; one supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP
  • Three USARTs supporting master synchronous SPI and modem control; with ISO7816 interface, LIN, IrDA capability, auto baud rate detection, wakeup feature
  • Three SPIs (18 Mbit/s) with 4 to 16 programmable bit frame, muxed I2S
  • HDMI-CEC bus interface
• Serial wire devices, JTAG, Cortex-M4F ETM
• 96-bit unique ID

管脚定义图