This 1-bit to 4-bit address register/driver is designed for 1.65-V to 3.6-V VCC operation. This device is ideal for use in applications in which a single address bus is driving four separate memory locations. The SN74ALVCH16832 can be used as a buffer or a register, depending on the logic level of the select (SEL)\ input.
When SEL\ is a logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE)\ inputs. Each OE\ controls two groups of seven outputs.
When SEL\ is a logic low, the device is in the register mode. The register is an edge-triggered D-type flip-flop. On the positive transition of the clock (CLK) input, data at the A inputs is stored in the internal registers
| SN74ALVCH16832 | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Technology Family | ALVC |
| Rating | Catalog |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74ALVCH16832DBBR | ACTIVE | -40 to 85 | 6.38 | 1ku | TSSOP (DBT) | 80 | 2000 | LARGE T&R | ALVCH16831 |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74ALVCH16832DBBR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVCH16832DBBR | SN74ALVCH16832DBBR |
