This bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
| SN74AUC1G125 | |
| Pin/Package | 5SC70 |
| Operating Temperature Range(°C) | -40 to 85 |
| IOL(mA) | 9 |
| Voltage Nodes(V) | 2.5 |
| IOH(mA) | -9 |
| Input Level | 2.5V CMOS |
| Vcc max(V) | 2.7 |
| Technology Family | AUC |
| Vcc min(V) | 0.8 |
| Approx. Price (US$) | 0.13 | 1ku |
| Output Level | 2.5V CMOS |
| No. of Gates | 1 |
| tpd max(ns) | 107 |
| ICC(uA) | 10 |
| Rating | Catalog |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74AUC1G125DCKR | ACTIVE | -40 to 85 | 0.13 | 1ku | SC70 (DCK) | 5 | 3000 | LARGE T&R | UVR |
| SN74AUC1G125DCKRG4 | ACTIVE | -40 to 85 | 0.13 | 1ku | SC70 (DCK) | 5 | 3000 | LARGE T&R | UVR |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74AUC1G125DCKR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC1G125DCKR | SN74AUC1G125DCKR |
| SN74AUC1G125DCKRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC1G125DCKRG4 | SN74AUC1G125DCKRG4 |
