SN74AUC2G125 具有三态输出的双总线缓冲器闸

SN74AUC2G125 描述

This dual bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G125 features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027

SN74AUC2G125
IOL(mA) 9  
IOH(mA) -9  
Vcc max(V) 2.7  
Technology Family AUC  
Vcc min(V) 0.8  
No. of Gates 2  
tpd max(ns) 1.3  
ICC(uA) 10  
Rating Catalog
SN74AUC2G125 特性
SN74AUC2G125 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AUC2G125YZPR ACTIVE -40 to 85 0.40 | 1ku DSBGA (YZD) | 8 3000 | LARGE T&R UM7
SN74AUC2G125 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AUC2G125DCKR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUC2G125DCKR SN74AUC2G125DCKR
SN74AUC2G125 应用技术支持与电子电路设计开发资源下载
  1. SN74AUC2G125 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)