The SN74LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.
This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
SN74LVC540A-Q1 | |
Voltage Nodes(V) | 3.3, 2.7 |
Vcc range(V) | 2.0 to 3.6 |
Input Level | TTL/CMOS |
Output Level | LVTTL |
No. of Outputs | 8 |
Output Drive(mA) | -24/24 |
tpd max(ns) | 5.3 |
Static Current | 0.01 |
Logic | Inv |
Technology Family | LVC |
Rating | Automotive |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
CLVC540AQDWRG4Q1 | ACTIVE | -40 to 125 | 0.36 | 1ku | SOIC (DW) | 20 | 2000 | |
CLVC540AQPWRG4Q1 | ACTIVE | -40 to 125 | 0.41 | 1ku | TSSOP (PW) | 20 | 2000 | |
SN74LVC540AQDWRQ1 | ACTIVE | -40 to 125 | 0.36 | 1ku | SOIC (DW) | 20 | 2000 | |
SN74LVC540AQPWRQ1 | ACTIVE | -40 to 125 | 0.41 | 1ku | TSSOP (PW) | 20 | 2000 |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
CLVC540AQDWRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CLVC540AQDWRG4Q1 | CLVC540AQDWRG4Q1 |
CLVC540AQPWRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CLVC540AQPWRG4Q1 | CLVC540AQPWRG4Q1 |
SN74LVC540AQDWRQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC540AQDWRQ1 | SN74LVC540AQDWRQ1 |
SN74LVC540AQPWRQ1 | Pb-Free (RoHS) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC540AQPWRQ1 | SN74LVC540AQPWRQ1 |