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ADS58B18 具有 SNRBoost 的双通道 11 位 200MSPS ADC



	ADS5517	ADS58B18
Resolution(Bits)	11	11
Sample Rate (max)	200MSPS	200MSPS
Architecture	Pipeline	Pipeline
Power Consumption(Typ)(mW)	1230	310
SINAD(dB)	66	67
SNR(dB)	66	67.1
SFDR(dB)	84	81.7
DNL(Max)(+/-LSB)	0.5
INL(Max)(+/-LSB)	2
No Missing Codes(Bits)	11	11
ENOB(Bits)	10.8	10.83
No. of Supplies	2	2
Analog Voltage AV/DD(Min)(V)	3.0	1.65
Analog Voltage AV/DD(Max)(V)	3.6	1.95
Logic Voltage DV/DD(Min)(V)	3.6	1.65
Logic Voltage DV/DD(Max)(V)	3.6	1.95
Input Configuration Range	2V (p-p)	2V (p-p)
Reference Mode	Int and Ext	Int
Rating	Catalog	Catalog
Pin/Package	48VQFN	48VQFN
# Input Channels	1	1
Operating Temperature Range(°C)	-40 to 85	-40 to 85

ADS58B18 说明

The ADS58B18 is an 11-bit analog-to-digital converter (ADCs) with sampling rates up to 200MSPS and integrated analog input buffers. This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The analog input pins have buffers, with benefits of constant performance and input impedance across a wide frequency range. The ADS58B18 is well-suited for multi-carrier, wide bandwidth communications applications.

The ADS58B18 uses TI-proprietary SNRBoost technology that can be used to overcome SNR limitation as a result of quantization noise for bandwidth less than Nyquist (fS/2). This device has features such as digital gain and offset correction. The gain option can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies.

ADS58B18 特性

• Integrated High-Impedance Analog Input Buffer
  • Input Capacitance: 2pF
  • DC Resistance: 10kΩ
• Maximum Sample Rate: 200MSPS
• Ultralow Power
  • 1.8V Core Power: 202mW
  • 3.3V Buffer Power: 79mW
  • I/O Power: 34mW (DDR LVDS)
• Enhanced SNR Using TI-Proprietary SNRBoost Technology
• High Dynamic Performance:
  • SNR: 66.5dBFS at 150MHz
  • SNR: 80dBFS in 20MHz Bandwidth with SNRBoost
  • SFDR: 80dBc at 150MHz, –2dBFS Input
• Dynamic Power Scaling with Sample Rate
• Output Interface
  • Double Data Rate (DDR) LVDS with Programmable Swing and StrengthStandard Swing: 350mVLow Swing: 200mVDefault Strength: 100Ω Termination2x Strength: 50ΩTermination
  • 1.8V Parallel CMOS Interface Also Supported
• Programmable Gain up to 6dB for SNR/SFDR Trade-Off
• DC Offset Correction
• Supports Low Input Clock Amplitude

ADS58B18 芯片订购指南

器件	状态	温度 (oC)	封装 | 引脚	封装数量 | 封装载体	丝印标记
ADS58B18IRGZR	PREVIEW	-40 to 85	VQFN (RGZ) | 48	2500	AZ58B18
ADS58B18IRGZT	PREVIEW	-40 to 85	VQFN (RGZ) | 48	250	AZ58B18

ADS58B18 应用技术支持与电子电路设计开发资源下载

1. ADS58B18 数据资料 dataSheet 下载.PDF
2. TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
3. 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
4. 所选封装材料的热学和电学性质 (PDF 645 KB)
5. 高速数据转换 (PDF 1967 KB)
6. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
7. A Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF 461 KB)
8. A Spreadsheet for Calculating the Frequency Response of the ADS1250-54
9. Understanding the ADS1251, ADS1253, and ADS1254 Input Circuitry (PDF 39 KB)
10. Analog-to-Digital Converter Grounding Practices Affect System Performance (PDF 56 KB)
11. Principles of Data Acquisition and Conversion (PDF 50 KB)
12. Interleaving Analog-to-Digital Converters (PDF 64 KB)
13. What Designers Should Know About Data Converter Drift (PDF 95 KB)
14. Giving Delta-Sigma Converters a Gain Boost with a Front End Analog Gain Stage (PDF 70 KB)
15. Programming Tricks for Higher Conversion Speeds Utilizing Delta Sigma Converters (PDF 105 KB)

ADS58B18 工具与软件

名称	型号	公司	工具/软件类型
用于模数转换器的抗混淆计算工具	ANTIALIASINGCALC	Texas Instruments	计算实用程序
运算放大器至 ADC 电路拓扑计算器	ADC-INPUT-CALC	Texas Instruments	计算实用程序