SRC4382 2 通道采样率转换器，具有数字音频接口接收器和发送器
|
SRC4382 |
| # SRC Channels |
2 |
| Dynamic Range(dB) |
128 |
| THD+N(dB) |
-125 |
| Sample Rate (max) |
216 |
| Digital Audio Interface |
AES/EBU,S/PDIF |
| Control Interface |
SPI, I2C |
| Digital Supply (up to 5 V)(V) |
1.65 - 1.95, 3 - 3.6 |
| Operating Temperature Range(°C) |
-40 to 85 |
| Pin/Package |
48TQFP |
SRC4382 说明
The SRC4382 is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The SRC4382 combines a high-performance, two-channel, asynchronous sample rate converter (SRC) with a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.
The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports, DIT, and SRC may be operated at sampling rates up to 216kHz. The DIR lock range includes sampling rates from 20kHz to 216kHz.
The SRC4382 is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface.
SRC4382 特性
- Two-Channel Asynchronous Sample Rate Converter (SRC)
- Dynamic Range with -60dB Input (A-Weighted): 128dB typical
- Total Harmonic Distortion and Noise (THD+N) with Full-Scale Input: -125dB typical
- Supports Audio Input and Output Data Word Lengths Up to 24 Bits
- Supports Input and Output Sampling Frequencies Up to 216kHz
- Automatic Detection of the Input-to-Output Sampling Ratio
- Wide Input-to-Output Conversion Range: 16:1 to 1:16 Continuous
- Excellent Jitter Attenuation Characteristics
- Digital De-Emphasis Filtering for 32kHz, 44.1kHz, and 48kHz Input Sampling Rates
- Digital Output Attenuation and Mute Functions
- Output Word Length Reduction
- Status Registers and Interrupt Generation for Sampling Ratio and Ready Flags
- Digital Audio Interface Transmitter (DIT)
- Supports Sampling Rates Up to 216kHz
- Includes Differential Line Driver and CMOS Buffered Outputs
- Block-Sized Data Buffers for Both Channel Status and User Data
- Status Registers and Interrupt Generation for Flag and Error Conditions
- User-Selectable Serial Host Interface: SPI or Philips I2C™
- Provides Access to On-Chip Registers and Data Buffers
- Digital Audio Interface Receiver (DIR)
SRC4382 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SRC4382IPFB |
ACTIVE |
-40 to 85 |
7.15 | 1ku |
TQFP (PFB) | 48 |
250 | JEDEC TRAY (5+1) |
SRC4382I |
| SRC4382IPFBG4 |
ACTIVE |
-40 to 85 |
7.15 | 1ku |
TQFP (PFB) | 48 |
250 | JEDEC TRAY (5+1) |
SRC4382I |
| SRC4382IPFBR |
ACTIVE |
-40 to 85 |
6.50 | 1ku |
TQFP (PFB) | 48 |
1000 | LARGE T&R |
SRC4382I |
| SRC4382IPFBRG4 |
ACTIVE |
-40 to 85 |
6.50 | 1ku |
TQFP (PFB) | 48 |
1000 | LARGE T&R |
SRC4382I |
SRC4382 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SRC4382IPFB |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
|
SRC4382IPFB |
| SRC4382IPFBG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SRC4382IPFBG4 |
SRC4382IPFBG4 |
| SRC4382IPFBR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
|
SRC4382IPFBR |
| SRC4382IPFBRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SRC4382IPFBRG4 |
SRC4382IPFBRG4 |
SRC4382 应用技术支持与电子电路设计开发资源下载
- SRC4382 数据资料 dataSheet 下载.PDF
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
SRC4382 工具与软件
