TLC320AD50 具有主从功能（3 个从）和 89 dB SNR 的单通道编解码器
|
TLC320AD50 |
| Sampling Rate(Max)(kHz) |
22.05 |
| Resolution(Bits) |
16 |
| Pd(Typ)(mW) |
120 |
| Operating Temperature Range(°C) |
-40 to 85 |
| Pin/Package |
28SOIC, 48LQFP |
TLC320AD50 描述
The TLC320AD50C, TLC320AD50I, and TLC320AD52C provide high-resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction) and includes an interpolation filter before the DAC and a decimation filter after the ADC. Other overhead functions on the chip include timing (sample rate, FSD delay) and control (programmable gain amplifier, PLL, communication protocol, etc.). The sigma-delta architecture produces high resolution A/D and D/A conversion at a low system cost.
Programmable functions of this device can be selected through the serial interface.
TLC320AD50 特性
- General-purpose analog interface circuit for V.34+ modem and business audio applications
- 16-bit oversampling sigma-delta ADC and DAC
- Serial port interface
- Typical 89-dB SNR (signal-to-noise ratio) for ADC and DAC
- Typical 90-dB THD (signal to total harmonic distortion) for ADC and DAC
- Typical 88-dB dynamic range
- Test mode that includes a digital loopback test and analog loopback test
- Programmable A/D and D/A conversion rate
- Programmable input and output gain control
- Maximum conversion rate: 22.05 kHz
- Single 5-V power supply voltage or 5-V analog and 3-V digital power supply voltage
- Power dissipation (PD) of 120 mW rms typical in the operating mode
- Hardware power-down mode to 7.5 mW
- Internal reference voltage (Vref)
- Differential architecture throughout device
- TLC320AD50C/I can support up to three slave devices; TLC320AD52C can support one slave
- 2s complement data format
- ALTDATA terminal provides data monitoring
- Monitor amplifier to monitor input signals
- On-chip phase locked loop (PLL)
TLC320AD50 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TLC320AD50CDW |
ACTIVE |
|
27.53 | 1ku |
SOIC (DW) | 28 |
20 | TUBE |
TLC320AD50C |
| TLC320AD50CDWR |
ACTIVE |
|
27.53 | 1ku |
SOIC (DW) | 28 |
1000 | LARGE T&R |
TLC320AD50C |
| TLC320AD50CPT |
ACTIVE |
|
27.53 | 1ku |
LQFP (PT) | 48 |
250 | JEDEC TRAY (10+1) |
P320AD50 |
| TLC320AD50CPTR |
ACTIVE |
|
27.53 | 1ku |
LQFP (PT) | 48 |
1000 | LARGE T&R |
P320AD50 |
| TLC320AD50IDW |
ACTIVE |
-40 to 85 |
27.53 | 1ku |
SOIC (DW) | 28 |
20 | TUBE |
TLC320AD50C |
TLC320AD50 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TLC320AD50CDW |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
|
TLC320AD50CDW |
| TLC320AD50CDWR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
|
TLC320AD50CDWR |
| TLC320AD50CPT |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
|
TLC320AD50CPT |
| TLC320AD50CPTR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
|
TLC320AD50CPTR |
| TLC320AD50IDW |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
|
TLC320AD50IDW |
TLC320AD50 应用技术支持与电子电路设计开发资源下载
- TLC320AD50 数据资料 dataSheet 下载.PDF
- TI 德州仪器音频编解码器产品选型与价格参考 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
TLC320AD50 工具与软件
