VSP2264 | |
Resolution(Bits) | 12 |
Samples/Sec(MSPS) | 25 |
Gain(Min)(dB) | -6 |
Gain(Max)(dB) | 42 |
Pd(Typ)(mW) | 130 |
Supply Voltage(s)(V) | 3 - 3.3 |
Output Data Format | CMOS Parallel |
Pin/Package | 96BGA MICROSTAR JUNIOR |
The VSP2264 is a complete mixed-signal IC for CCD signal processing with a CCD timing generator and A/D converter. The system synchronizes the master clock, HD, and VD. The VSP2264 supports all signal terminals that the CCD and the vertical driver require. The R driver and H driver synchronize the A/D converter clock phase to realize ideal performance. The CCD channel has correlated double sampling (CDS) to extract image information from the CCD output signal. The digital control gain curve is linear in dB, ranging from –6 dB to 42 dB. A black-level clamping circuit ensures black reference level accuracy and speeds black-level recovery after a gain change. Input signal clamping with a CDS offset adjustment function is available.
器件 | 状态 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
VSP2264GSJR | ACTIVE | 13.10 | 1ku | BGA MICROSTAR JUNIOR (ZSJ) | 96 | 1000 | LARGE T&R | VSP2264 |
VSP2264ZSJR | ACTIVE | 13.10 | 1ku | BGA MICROSTAR JUNIOR (ZSJ) | 96 | 1000 | LARGE T&R | VSP2264 |
VSP2264ZSJRG1 | ACTIVE | 13.10 | 1ku | BGA MICROSTAR JUNIOR (ZSJ) | 96 | 1000 | LARGE T&R | VSP2264 |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
VSP2264GSJR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | VSP2264GSJR | |
VSP2264ZSJR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | VSP2264ZSJR | |
VSP2264ZSJRG1 | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | VSP2264ZSJRG1 |