The ADM560/ADM561 are four driver/five receiver interface devices designed to meet the EIA-232 standard while operating with a single +3.3 V power supply. The devices feature an on-board dc-to-dc converter, eliminating the need for dual ±5 V power supplies. This dc-dc converter contains a voltage doubler and voltage inverter which internally generates ±6.6 V from the input +3.3 V power supply.
The ADM560 and ADM561 consume only 5 mW making them ideally suited for battery and other power-sensitive applications. A shutdown facility is also provided which reduces the power to 0.66 µW.
The ADM560 contains active low shutdown and active high receiver enable signals. In shutdown mode, two receivers remain active thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device begins communication. The active receivers can alert the processor which can then take the ADM560 out of the shutdown mode.
The ADM561 features active high shutdown and an active low receiver enable. In this device all receivers are disabled in shutdown.
The ADM560/ADM561 is fabricated using CMOS technology for minimal power consumption. It features a high level of over-voltage protection and latch-up immunity. The receiver inputs can withstand up to ±25 V levels. The transmitter inputs can be driven from either 3V or 5V logic levels. This allows operation in mixed 3 V/5 V power supply systems.
The ADM560/ADM561 is packaged in a 28-pin SO and a 28-pin SSOP package.
产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
---|---|---|---|---|
ADM561JR | 量产 | 28 ld SOIC - Wide | 28 | 商业 |
ADM561JRS | 量产 | 28 ld SSOP | 28 | 商业 |
ADM561JRS-REEL | 量产 | 28 ld SSOP | 28 | 商业 |
ADM561JRSZ | 量产 | 28 ld TSSOP (4.4mm) | 28 | 商业 |
ADM561JRSZ-REEL | 量产 | 28 ld SSOP | 28 | 商业 |
ADM561JRZ | 量产 | 28 ld SOIC - Wide | 28 | 商业 |
ADM561JRZ-REEL | 量产 | 28 ld SOIC - Wide | 28 | 商业 |