产品特点和性能优势静态超标量体系结构支持1、8、16和32位定点和浮点数据处理高性能600 MHz、1.67 ns指令速率DSP核24 Mbit片上SRAM,使用用户定义的分区,内部分为6个区Static Superscalar architecture which supports 1, 8, 16 and 32-bit fixed point as well as floating point data processing14个通道、零开销DMA控制器High performance up to 600 MHz, 1.67 ns instruction rate DSP core24 Mbit on-chip embedded DRAM internally organized in six banks with user-defined partitioning增强的通信指令集,用于无线基础结构应用,使得TigerSHARC可以提供完整的基带处理4个内部128-bit宽内部总线,提供每秒38.4 Gbyte的总存储带宽Enhanced communications instruction set for wireless infrastructure applications allows for the TigerSHARC Processor to offer complete baseband processing14 channel, zero overhead DMA controller软件无线电方法,使得多个无线电信标准可以采用一个平台Four internal 128-bit wide internal buses providing a total memory bandwidth of 38.4 Gbytes per second单指令多数据(SIMD)操作,由2个计算模块支持,每个都具有ALU、乘法器、移相器和32字寄存器文件Software radio approach allows for the adoption of a single platform for multiple wireless telecommunication standards汇编和C语言编程能力Single instruction multiple-data (SIMD) operation supported by two computation blocks each with an ALU, multiplier, shifter and 32-word register fileAssembly and C language programmability | 安防和监控航空航天和防务IBIS模型BSDL模型 |