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ATF16LV8C

A high-performance EECMOS programmable logic device (PLD) based on Atmel's proven electrically erasable flash memory technology. The device supports The device supports speeds down to 10 ns and offers a 5 μA pin-controlled power-down mode option. All speed ranges are specified over the full 3.0V to 5.25V range for industrial and commercial temperature ranges. A superset of the generic architectures replaces 16R8 family and most 20-pin combinatorial PLDs. The device can significantly reduce total system power, enhancing system reliability and reducing power supply costs.

DataSheet 数据手册

• ATF16LV8C Complete(文件大小: 218100, 15 页数, 修订版 H, 更新时间: 06/2006)

Application Note

• Atmel PLD Design Guidelines(12 页数, 更新时间: 09/2000)
• Programming of Atmel PLDs(文件大小: 184KB, 4 页数, 修订版 A, 更新时间: 08/2015)
• Saving Power with Atmel PLDs(7 页数, 更新时间: 09/2000)
• Selecting Decoupling Capacitors for Atmel PLDs(4 页数, 更新时间: 09/1999)
• Tips on Using Test Vectors for Atmel PLDs(20 页数, 更新时间: 09/1999)
• Using Programmable Logic Devices(4 页数, 更新时间: 09/1999)
• Using the Programmable Polarity Control(7 页数, 更新时间: 08/1999)

Qualification

• ATF16LV/V8C(Z) Reliability Qualification Report(文件大小: 73759, 7 页数, 更新时间: 07/2007)

White Paper

• Atmel CPLD Reference Designs(文件大小: 1660301, 17 页数, 更新时间: 01/2001)
  Atmel CPLD Reference Designs