LTC3718 - Low Input Voltage, DC/DC Controller for DDR/QDR Memory Termination

The LTC®3718 is a high current, high efficiency synchronous switching regulator controller for DDR and QDR™ memory termination. It operates from an input as low as 1.5V and provides a regulated output voltage equal to (0.5)VIN. The controller uses a valley current control architecture to enable high frequency operation with very low on-times without requiring a sense resistor. Operating frequency is selected by an external resistor and is compensated for variations in VIN and VOUT. The LTC3718 uses a pair of standard 5V logic level N-channel external MOSFETs, eliminating the need for expensive P-channel or low threshold devices.

Forced continuous operation reduces noise and RF interference. Fault protection is provided by internal foldback current limiting, an output overvoltage comparator and an optional short-circuit timer. Soft-start capability for supply sequencing can be accomplished using an external timing capacitor. OPTI-LOOP® compensation allows the transient response to be optimized over a wide range of loads and output capacitors.

OPTI-LOOP is a registered trademark of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation. QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress Semiconductor, IDT and Micron Technology, Inc.

特点
  • Very Low VIN(MIN): 1.5V
  • Ultrafast Transient Response
  • True Current Mode Control
  • 5V Drive for N-Channel MOSFETs Eliminates Auxillary 5V Supply
  • No Sense Resistor Required
  • Uses Standard 5V Logic-Level N-Channel MOSFETs
  • VOUT(MIN): 0.4V
  • VOUT Tracks 1/2 VIN or External VREF
  • Symmetrical Source and Sink Output Current Limit
  • Adjustable Switching Frequency
  • tON(MIN) <100ns
  • Power Good Output Voltage Monitor
  • Programmable Soft-Start
  • Output Overvoltage Protection
  • Optional Short-Circuit Shutdown Timer
  • Small 24-Lead SSOP Package
典型应用
LTC3718 Typical Application
LTC3718 Typical Application
应用
  • Bus Termination: DDR/QDR Memory, SSTL, HSTL,...
  • Servers, RAID Systems
  • Distributed Power Systems
  • Synchronous Buck with General Purpose Boost
封装信息
LTC3718 Package Drawing
Order Information 订购型号
器件型号封装温度价格 (以 1 ~ 99 片为批量)价格 (以 1000 片为批量) *
LTC3718EG#PBFSSOP-24E$4.91$3.45
LTC3718EG#TRPBFSSOP-24E$3.55
演示电路板
器件型号描述价格
DC464ALTC3718EG | Low Input Voltage, High Current, DDR Termination Supply, 1.5-5Vin, VRef/2 @ 0-12a联系凌力尔特
数据表
设计要点
可靠性数据
LT Journal
CAD 符号
相关产品
LTC3718 - Low Input Voltage, DC/DC Controller for DDR/QDR Memory Termination
DN281 - Wide Input Range, High Efficiency DDR Termination Power Supply Achieves Fast Transient Response
R384 Reliability Data
Mar 2002 High Efficiency DDR Termination Power Supplies Source and Sink More than 10 Amps
LTC3718 Footprints and Symbols