74AHCT139PW: 双路2至4线路解码器/解复用器

74AHC139;74AHCT139是高速硅栅CMOS器件,与低功耗肖特基TTL (LSTTL)针脚兼容。其规格符合JEDEC标准No. 7-A。

74AHC139;74AHCT139是高速双路2至4线路解码器/解复用器。该器件具有两个独立的解码器,每个解码器都接受两个二进制加权输入(nA0和nA1),提供四个互斥低电平有效输出(nY0至nY3)。每个解码器都具有一个低电平有效使能输入(nE)。nE为高电平时,每个输出都被强制为高电平。使能输入可用作适合1至4线路解复用器应用的数据输入。

74AHC139;74AHCT139等同于HE4000B系列的HEF4556。

74AHCT139PW: 产品结构框图
Outline 3d SOT403-1
数据手册 (1)
名称/描述Modified Date
Dual 2-to-4 line decoder/demultiplexer (REV 2.0) PDF (84.0 kB) 74AHC_AHCT139 [English]09 May 2008
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]04 Nov 2011
手册 (2)
名称/描述Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic thin shrink small outline package; 16 leads; body width 4.4 mm (REV 1.0) PDF (300.0 kB) SOT403-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (218.0 kB) SOT403-1_118 [English]08 Apr 2013
支持信息 (1)
名称/描述Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
订购信息
型号状态Family功能VCC (V)说明Logic switching levelsOutput drive capability (mA)Package versiontpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AHCT139PWActiveAHC(T)Decoders/demultiplexers4.5 - 5.5TTL enabledTTL+/- 8SOT403-13.6low-40~1251224.052TSSOP1616
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74AHCT139PWSOT403-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1Active74AHCT139PW,118 (9352 635 68118)AHCT13974AHCT139PWweek 10, 200584.96.621.51E811
Bulk PackActive74AHCT139PW,112 (9352 635 68112)AHCT13974AHCT139PWweek 10, 200584.96.621.51E811
Dual 2-to-4 line decoder/demultiplexer 74AHCT139PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
ahct139 IBIS model 74AHCT139PW
SOT403-1 LPC812M101JDH16
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
Reel 13" Q1/T1 LPC812M101JDH16
74AHC_T_139
PCA9633