74AHCT2G00GD: 双路2输入与非门 _ BDTIC 中国领先电子元器件代理商

74AHCT2G00GD: 双路2输入与非门

74AHC2G00；74AHCT2G00是高速硅栅CMOS器件。它们提供两个2输入与非门。

AHC器件具有CMOS输入切换电平和2 V至5.5 V的电源电压范围。

AHCT器件具有TTL输入切换电平和4.5 V至5.5 V的电源电压范围。

74AHCT2G00GD: 产品结构框图

Outline 3d SOT996-2

数据手册 (1)

名称/描述	Modified Date
Dual 2-input NAND gate (REV 3.0) PDF (178.0 kB) 74AHC_AHCT2G00 [English]	27 Mar 2013

应用说明 (7)

名称/描述	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]	04 Nov 2011
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]	30 Dec 2010
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]	30 Oct 2002

手册 (2)

名称/描述	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

选型工具指南 (2)

名称/描述	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

封装信息 (1)

名称/描述	Modified Date
plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm (REV 1.0) PDF (190.0 kB) SOT996-2 [English]	08 Feb 2016

包装 (1)

名称/描述	Modified Date
XSON8(U); Reel pack, Reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... (REV 5.0) PDF (200.0 kB) SOT996-2_125 [English]	02 May 2013

IBIS

ahct2g00 IBIS model (REV 1.0) ibs AHCT2G00 4/7/2013

订购信息

型号	状态	Family	V_CC (V)	功能	说明	类型	Logic switching levels	Package version	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	No of bits	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74AHCT2G00GD	Active	AHC(T)	4.5 - 5.5	NAND gates	TTL enabled	NAND gates	TTL	SOT996-2	+/- 8	3.6	60	2	low	-40~125	623	85.0	281	XSON8	8

封装环保信息

产品编号	封装说明	Outline Version	回流/波峰焊接	包装	产品状态	部件编号订购码 (12NC)	Marking	化学成分	RoHS / 无铅 / RHF	无铅转换日期	EFR	IFR(FIT)	MTBF（小时）	MSL	MSL LF
74AHCT2G00GD		SOT996-2		Reel 7" Q3/T4, Reverse	Active	74AHCT2G00GD,125 (9352 885 58125)	C00	74AHCT2G00GD		Always Pb-free	84.9	6.62	1.51E8	1	1

Dual 2-input NAND gate 74AHCT2G00GD

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100

MicroPak soldering information NTS0102_Q100

PicoGate Logic footprints NX3L4684

電圧レベルシフタ 74AVC16245DGG-Q100

Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100

ロジック製品セレクションガイド... 74LVC_H_245A_Q100

Logic selection guide 2016 74LVC_H_245A_Q100

ahct2g00 IBIS model 74AHCT2G00GD

plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm 74AHC_T_3G14_Q100

XSON8(U); Reel pack, Reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... 74AHC_T_3G14_Q100

74HCT2G02GM

LM75B

©1993 - 2024 BDTIC