74AHC(T)164: 8位串行输入/并行输出移位寄存器

74AHC164;74AHCT164移位寄存器是高速硅栅CMOS器件,与低功耗肖特基TTL (LSTTL)针脚兼容。该类器件的规格符合JEDEC标准No. 7A。

74AHC164;74AHCT164输入信号是通过两个输入(DSA或DSB)之一的8位串行信号;其中任意一个输入都可以用作高电平有效使能,实现通过另一个输入的数据输入。两个输入必须连接在一起或未使用的输入必须连接高电平。

数据在时钟输入(CP)每次从低电平跃迁至高电平时向右移一位并进入输出Q0,这即形成两个数据输入(DSA和DSB)的逻辑与功能,存在于上升时钟沿之前的一个设置时间。

主复位(MR)输入上的低电平覆盖所有其他输入并异步清零寄存器,从而将所有输出强制为低电平。

74AHC_T_164: 产品结构框图
Outline 3d SOT402-1
数据手册 (1)
名称/描述Modified Date
8-bit serial-in/parallel-out shift register (REV 3.0) PDF (102.0 kB) 74AHC_AHCT164 [English]24 Apr 2008
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]04 Nov 2011
手册 (2)
名称/描述Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (3)
名称/描述Modified Date
plastic small outline package; 14 leads; body width 3.9 mm (REV 1.0) PDF (166.0 kB) SOT108-1 [English]08 Feb 2016
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English]08 Feb 2016
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... (REV 1.0) PDF (187.0 kB) SOT762-1 [English]08 Feb 2016
包装 (3)
名称/描述Modified Date
Standard product orientation 12NC ending 115 (REV 3.0) PDF (108.0 kB) SOT762-1_115 [English]09 Apr 2013
SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 4.0) PDF (207.0 kB) SOT108-1_118 [English]08 Apr 2013
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English]08 Apr 2013
支持信息 (3)
名称/描述Modified Date
Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
8-bit serial-in/parallel-out shift register 74AHCT164PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
plastic small outline package; 14 leads; body width 3.9 mm 74LV164_Q100
plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... 74LV164_Q100
Standard product orientation 12NC ending 115 74LV164_Q100
SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... 74LV164_Q100
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
Footprint for reflow soldering NPIC6C596A_Q100
Footprint for wave soldering NPIC6C596A_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
ahc164 IBIS model 74AHC164PW
ahct164 IBIS model 74AHCT164PW
74HC_T_164
74LV164