74ALVC374BQ: 八频D型触发器;正沿触发器(三态)

74ALVC374是八路D类触发器,具有用于每个触发器的独立D类输入以及用于总线应用的三态输出。时钟输入(CP)和输出使能输入(OE)常用于所有触发器。

八个触发器会存储它们各自的D输入状态,满足CP从低到高转换的建立和保持时间要求。

引脚OE为低电平时,八个触发器的内容在输出处可用。引脚OE为高电平时,输出会进入高阻抗关断状态。OE输入的操作不会影响触发器的状态。

74ALVC374在功能上等同于74ALVC574,但具有不同的引脚排列。

74ALVC374BQ: 产品结构框图
Outline 3d SOT764-1
数据手册 (1)
名称/描述Modified Date
Octal D-type flip-flop; positive-edge trigger; 3-state (REV 2.0) PDF (99.0 kB) 74ALVC374 [English]17 Oct 2007
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
手册 (3)
名称/描述Modified Date
Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English]10 Jul 2015
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x... (REV 1.0) PDF (190.0 kB) SOT764-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or... (REV 4.0) PDF (203.0 kB) SOT764-1_115 [English]23 Apr 2013
IBIS
订购信息
型号状态Family功能VCC (V)说明Logic switching levelsPackage versionOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74ALVC374BQActiveALVCD-type flip-flops1.65 - 3.6positive-edge trigger (3-state)TTLSOT764-1+/- 242.5300low-40~85778.449DHVQFN2020
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74ALVC374BQSOT764-1Reel 7" Q1/T1Active74ALVC374BQ,115 (9352 855 58115)ALVC37474ALVC374BQAlways Pb-free123.83.872.58E811
Octal D-type flip-flop; positive-edge trigger; 3-state 74ALVC374PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
Low voltage CMOS family - LVC 74LVC_H_245A_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
alvc374 IBIS model 74ALVC374PW
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x... 74LVC_H_245A_Q100
DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or... 74LVC_H_245A_Q100
74ALVC374
74VHC_T_245