74ALVT16373DL: 2.5 V / 3.3 V 16位D型透明锁存器（3态） _ BDTIC 中国领先电子元器件代理商

74ALVT16373DL: 2.5 V / 3.3 V 16位D型透明锁存器（3态）

74ALVT16373是高性能BiCMOS产品，设计用于2.5V或3.3V的VCC操作，I/O兼容性高达5V。

该器件是带非反相3态总线兼容输出的16位透明D型锁存器。该器件可用作两个8位锁存器或一个16位锁存器。锁存使能(LE)输入为高电平时，Q输出跟随数据(D)输入。锁存使能变为低电平时，Q输出会在从高电平跃迁至低电平前的一个设置时间被锁存为D输入处的电平。

74ALVT16373DL: 产品结构框图

Outline 3d SOT370-1

数据手册 (1)

名称/描述	Modified Date
2.5 V / 3.3 V 16-bit transparent D-type latch (3-state) (REV 3.0) PDF (99.0 kB) 74ALVT16373 [English]	14 Mar 2014

应用说明 (9)

名称/描述	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
A metastability primer (REV 1.0) PDF (40.0 kB) AN219 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]	02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]	01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]	01 Jan 1998
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]	15 Sep 1995

手册 (2)

名称/描述	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

选型工具指南 (2)

名称/描述	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

封装信息 (1)

名称/描述	Modified Date
plastic shrink small outline package; 48 leads; body width 7.5 mm (REV 1.0) PDF (482.0 kB) SOT370-1 [English]	08 Feb 2016

包装 (1)

名称/描述	Modified Date
Standard product orientation 12NC ending 118 (REV 2.0) PDF (87.0 kB) SOT370-1_118 [English]	19 Apr 2013

支持信息 (2)

名称/描述	Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]	08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS

alvt16373 IBIS model (REV 1.0) ibs ALVT16373 4/7/2013

SPICE

alvt16 Spice model (REV 1.0) ZIP ALVT16 5/7/2013

订购信息

型号	状态	Family	V_CC (V)	功能	Logic switching levels	说明	Package version	Output drive capability (mA)	t_pd (ns)	No of bits	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74ALVT16373DL	Active	ALVT	2.3 - 3.6	Latches/registered drivers	TTL	16-bit D-type transparent latch with bus hold (3-state)	SOT370-1	-32/+64	1.8	16	medium	-40~85	88	25.0		SSOP48	48

封装环保信息

产品编号	封装说明	Outline Version	回流/波峰焊接	包装	产品状态	部件编号订购码 (12NC)	Marking	化学成分	RoHS / 无铅 / RHF	无铅转换日期	EFR	IFR(FIT)	MTBF（小时）	MSL	MSL LF
74ALVT16373DL		SOT370-1	SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE	Reel 13" Q1/T1	Active	74ALVT16373DL,118 (9352 095 80118)	ALVT16373	74ALVT16373DL		week 13, 2005	70.8	1.33	7.52E8	1	1
74ALVT16373DL		SOT370-1		Bulk Pack	Active	74ALVT16373DL,112 (9352 095 80112)	ALVT16373	74ALVT16373DL		week 13, 2005	70.8	1.33	7.52E8	1	1

2.5 V / 3.3 V 16-bit transparent D-type latch (3-state) 74ALVT16373DL

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

A metastability primer 74AHC573PW

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Test Fixtures for High Speed Logic 74ABTH162245ADL

Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG

LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG

Interfacing 3 Volt and 5 Volt Applications 74LVC377PW

電圧レベルシフタ 74AVC16245DGG-Q100

Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100

ロジック製品セレクションガイド... 74LVC_H_245A_Q100

Logic selection guide 2016 74LVC_H_245A_Q100

alvt16373 IBIS model 74ALVT16373DL

alvt16 Spice model 74ALVT16827DL

plastic shrink small outline package; 48 leads; body width 7.5 mm gtl2000dl

Footprint for reflow soldering 74HC_T_595_Q100

SSOP-TSSOP-VSO-WAVE LPC1114FDH28

Standard product orientation 12NC ending 118 gtl2000dl

74LVT16373A

74LVT162245B

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