74ALVT16827DL: 20位缓冲器/线路驱动器;非反相;3态

74ALVT16827高性能BiCMOS器件结合了低静态和动态功耗以及高速和高输出驱动。其设计用于2.5 V或3.3 V的VCC操作,I/O兼容性达5 V。

74ALVT16827 20位缓冲器提供高性能总线接口缓冲,用于宽数据/地址路径或总线负载奇偶校验。它们具有NOR输出使能(nOE1和nOE2),可实现最大控制灵活性。

74ALVT16827DL: 产品结构框图
74ALVT16827DL: 应用结构框图
74ALVT16827DL: 应用结构框图
Outline 3d SOT371-1
数据手册 (1)
名称/描述Modified Date
20-bit buffer/line driver; non-inverting; 3-state (REV 3.0) PDF (95.0 kB) 74ALVT16827 [English]02 Jun 2005
应用说明 (8)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]01 Jan 1998
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
手册 (2)
名称/描述Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic shrink small outline package; 56 leads; body width 7.5 mm (REV 1.0) PDF (530.0 kB) SOT371-1 [English]08 Feb 2016
支持信息 (2)
名称/描述Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
SPICE
订购信息
型号状态FamilyVCC (V)功能说明Logic switching levelsPackage versionOutput drive capability (mA)fmax (MHz)No of bitstpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74ALVT16827DLActiveALVT2.3 - 3.6Buffers/inverters/drivers20-bit buffer/line driver with bus hold (3-state)LVTTLSOT371-1-32 / +64200201.3medium-40~858424.0SSOP5656
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74ALVT16827DLSOT371-1SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
Tube in DrypackActive74ALVT16827DL,512 (9352 100 40512)ALVT1682774ALVT16827DLweek 13, 200570.81.337.52E812
Reel 13" Q1/T1 in DrypackActive74ALVT16827DL,518 (9352 100 40518)ALVT1682774ALVT16827DLweek 13, 200570.81.337.52E812
Reel 13" Q1/T1Withdrawn74ALVT16827DL,118 (9352 100 40118)ALVT1682774ALVT16827DL70.81.337.52E81NA
20-bit buffer/line driver; non-inverting; 3-state 74ALVT16827DL
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Test Fixtures for High Speed Logic 74ABTH162245ADL
Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG
LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
alvt16827 IBIS model 74ALVT16827DL
alvt16 Spice model 74ALVT16827DL
SOT371-1 74LVT16543ADL
Footprint for reflow soldering 74HC_T_595_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
74AVCM162836DGG
74ALVT16827
74LVT16543A