74HC109D-Q100: Descriptive title
The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop
featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset
(nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous
active LOW inputs and operate independently of the clock input. The nJ and nK inputs
control the state changes of the flip-flops as described in the mode select function
table. The nJ and nK inputs must be stable one set-up time prior to the LOW-to-HIGH
clock transition for predictable operation. The JK design allows operation as a D-type
flip-flop by connecting the nJ and nK inputs together. Inputs include clamp diodes. It
enables the use of current limiting resistors to interface inputs to voltages in excess
of VCC.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower
clock rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
sot109-1_3d
数据手册 (1)
封装信息 (1)
包装 (1)
支持信息 (2)
订购信息
| 型号 | 状态 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins | Package version |
|---|
| 74HC109D-Q100 | Active | | | | | | | | | | | SO16 | 16 | SOT109-1 |
封装环保信息
