74LVT245DB: 3.3 V八进制收发器，具有方向针脚（3态） _ BDTIC 中国领先电子元器件代理商

74LVT245DB: 3.3 V八进制收发器，具有方向针脚（3态）

74LVT245是高性能BiCMOS产品，设计用于3.3 V的VCC操作。

该器件是八位元收发器，在发送和接收方向上都具有非反相3态总线兼容输出。控制功能实施可最大限度减少外部定时要求。该器件具有一个可实现轻松级联的输出使能(OE)输入和一个可实现直接控制的直接(DIR)输入。

74LVT245DB: 产品结构框图

Outline 3d SOT339-1

数据手册 (1)

名称/描述	Modified Date
3.3 V octal transceiver with direction pin (3-state) (REV 4.0) PDF (125.0 kB) 74LVT245 [English]	24 Dec 2013

应用说明 (7)

名称/描述	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]	02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]	01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]	01 Jan 1998

选型工具指南 (2)

名称/描述	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

封装信息 (1)

名称/描述	Modified Date
plastic shrink small outline package; 20 leads; body width 5.3 mm (REV 1.0) PDF (325.0 kB) SOT339-1 [English]	08 Feb 2016

包装 (1)

名称/描述	Modified Date
SSOP20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code... (REV 1.0) PDF (204.0 kB) SOT339-1_118 [English]	02 Oct 2015

支持信息 (1)

名称/描述	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS

lvt245 IBIS model (REV 1.0) ibs LVT245 4/7/2013

SPICE

lvt Spice model (REV 1.0) ZIP LVT 5/7/2013

订购信息

型号	状态	Family	V_CC (V)	功能	Logic switching levels	说明	Output drive capability	Package version	t_pd (ns)	No of bits	f_max (MHz)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74LVT245DB	Active	LVT	2.7 - 3.6	Transceivers	TTL	octal transceiver (3-state)	-32/+64	SOT339-1	2.4	8	150	medium		136	40.0		SSOP20	20

封装环保信息

产品编号	封装说明	Outline Version	回流/波峰焊接	包装	产品状态	部件编号订购码 (12NC)	Marking	化学成分	RoHS / 无铅 / RHF	无铅转换日期	EFR	IFR(FIT)	MTBF（小时）	MSL	MSL LF
74LVT245DB		SOT339-1	SSOP-TSSOP-VSO-WAVE	Reel 13" Q1/T1	Active	74LVT245DB,118 (9351 552 20118)	LVT245	74LVT245DB		week 13, 2005	70.8	1.33	7.52E8	1	1
74LVT245DB		SOT339-1	SSOP-TSSOP-VSO-WAVE	Bulk Pack	Active	74LVT245DB,112 (9351 552 20112)	LVT245	74LVT245DB		week 13, 2005	70.8	1.33	7.52E8	1	1

3.3 V octal transceiver with direction pin (3-state) 74LVT245PW

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Test Fixtures for High Speed Logic 74ABTH162245ADL

Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG

LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG

ロジック製品セレクションガイド... 74LVC_H_245A_Q100

Logic selection guide 2016 74LVC_H_245A_Q100

lvt245 IBIS model 74LVT245PW

lvt Spice model 74LVT640PW

plastic shrink small outline package; 20 leads; body width 5.3 mm 74LVC373A_Q100

SSOP-TSSOP-VSO-WAVE LPC1114FDH28

SSOP20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code... 74LVC373A_Q100

74AVCM162836DGG

74LVT640

©1993 - 2024 BDTIC