LPC11A11FHN33: 8kB闪存、2kB SRAM、HVQFN32封装
LPC11A11FHN33是基于ARM Cortex-M0的低成本32位微控制器，设计用于8位/16位微控制器应用，提供性能、低功率、简单指令集和内存寻址，与现有8位/16位架构相比，代码尺寸更小。LPC11A11FHN33的CPU工作频率最高可达50 MHz。模拟/混合信号子系统可通过软件从互连的数字和模拟外设进行配置。
sot865-3_3d
数据手册 (2)
| 名称/描述 | 修改日期 |
|---|---|
| 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal (REV 1.1) PDF (2.6 MB) LPC11AXX_ZH_1 | 20 May 2016 |
| 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal (REV 4.0) PDF (1.8 MB) LPC11AXX | 30 Oct 2012 |
勘误表 (1)
| 名称/描述 | 修改日期 |
|---|---|
| Errata sheet LPC11Axx (REV 2.0) PDF (38.0 kB) ES_LPC11AXX | 17 Jan 2013 |
应用说明 (9)
| 名称/描述 | 修改日期 |
|---|---|
| AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN11241 | 17 Mar 2014 |
| In-Application Programming for the LPC11Axx (REV 1.0) ZIP (979.0 kB) AN11387 | 13 Aug 2013 |
| Using LPC11Axx EEPROM (with IAP) (REV 2.0) ZIP (147.0 kB) AN11073 | 09 Aug 2013 |
| Frequency counter using the analog comparator of the LPC11Axx (REV 1.0) ZIP (567.0 kB) AN11242 | 09 Aug 2013 |
| I2C secondary boot loader (REV 1.0) ZIP (661.0 kB) AN11258 | 09 Aug 2013 |
| How to implement the ROM I2C (REV 1.0) ZIP (890.0 kB) AN11249 | 22 Jul 2013 |
| SPI secondary boot loader (REV 1.0) ZIP (638.0 kB) AN11257 | 22 Jul 2013 |
| How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN11318 | 22 Jul 2013 |
| UUencoding for UART ISP (REV 1.0) PDF (139.0 kB) AN11229 | 06 Jul 2012 |
用户指南 (2)
| 名称/描述 | 修改日期 |
|---|---|
| LPC11Axx User manual (REV 5.0) PDF (2.5 MB) UM10527 | 23 Jan 2013 |
| LPC11Axx User manual (REV 1.0) PDF (3.7 MB) UM10527_ZH | 28 Aug 2012 |
手册 (1)
| 名称/描述 | 修改日期 |
|---|---|
| NXP® 50 MHz, 32-bit Cortex TM-M0 MCUs LPC11A00 (REV 1.0) PDF (729.0 kB) 75017092 | 01 Jun 2012 |
封装信息 (1)
| 名称/描述 | 修改日期 |
|---|---|
| plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 7 x 7 x 0.85 mm (REV 1.0) PDF (204.0 kB) SOT865-3 | 08 Feb 2016 |
支持信息 (1)
| 名称/描述 | 修改日期 |
|---|---|
| ADC design guidelines (REV 1.0) PDF (145.0 kB) TN00009 | 09 May 2014 |
订购信息
| 型号 | 状态 | 内核 | Clock speed [max] (MHz) | DMIPS | 闪存 (kB) | RAM (kB) | EEPROM (kB) | GPIO | 以太网 | USB | USB (speed) | USB (type) | LCD | CAN | UART | DAC (bits) | I²C | SPI | ADC sample rate | I²S | ADC channels | ADC (bits) | Comparators | 定时器 | Timer (bits) | SCTimer / PWM | RTC | PWM | Package name | Temperature range | Temperature sensor | IOH | Supply voltage [min] (V) | Supply voltage [max] (V) | Product category | Demoboard |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LPC11A11FHN33/101 | Introduction Pending | Cortex-M0 | 50 | 8 | 2 | 0.5 | 28 | 1 | 10 | 1 | 2 | 8 | 10 | 1 | 4 | 16; 32 | 1 | 11 | HVQFN32 | -40 °C to +85 °C | 1 | 1.8 | 3.6 | OM13025 | ||||||||||||
| LPC11A11FHN33/001 | Active | Cortex-M0 | 50 | 8 | 2 | 0.5 | 28 | 1 | 10 | 1 | 2 | 8 | 10 | 1 | 4 | 16; 32 | 1 | 11 | HVQFN32 | -40 °C to +85 °C | 1 | 1.8 | 3.6 | OM13025 |
封装环保信息
| 产品编号 | 封装说明 | Outline Version | 回流/波峰焊接 | 包装 | 产品状态 | 部件编号订购码 (12NC) | Marking | 化学成分 | RoHS / 无铅 / RHF | 无铅转换日期 | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LPC11A11FHN33/001 | | SOT865-3 | Tray, Bakeable, Single in Drypack | Active | LPC11A11FHN33/001, (9352 949 99551) | Standard Marking | LPC11A11FHN33/001 |    | Always Pb-free | 3 | 3 | |
| LPC11A11FHN33/101 | | SOT865-3 | Tray, Bakeable, Single in Drypack | Development | LPC11A11FHN33/101, (9352 939 74551) | Standard Marking | | Always Pb-free | 3 | 3 |
- 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal LPC11A14FHN33
- Errata sheet LPC11Axx LPC11A14FHN33
- AES encryption and decryption software on LPC microcontrollers LPC43S50FET256
- In-Application Programming for the LPC11Axx LPC11A14JBD48
- Using LPC11Axx EEPROM (with IAP) LPC11A14FHN33
- Frequency counter using the analog comparator of the LPC11Axx LPC11A14FHN33
- I2C secondary boot loader LPC1788FET208
- How to implement the ROM I2C LPC11A14FHN33
- SPI secondary boot loader LPC1788FET208
- How to implement the PMBus software stack LPC43S50FET256
- UUencoding for UART ISP LPC43S50FET256
- LPC11Axx User manual LPC11A14FHN33
- LPC11Axx User manual LPC11A14FHN33
- NXP® 50 MHz, 32-bit Cortex TM-M0 MCUs LPC11A00 LPC11A14FHN33
- ADC design guidelines LPC4333JET256
- SOT865-3 LPC1347FHN33
- NXQ1TXA1
