LPC11A12FHN33: 16kB闪存、4kB SRAM、HVQFN32封装

LPC11A12FHN33是基于ARM Cortex-M0的低成本32位微控制器,设计用于8位/16位微控制器应用,提供性能、低功率、简单指令集和内存寻址,与现有8位/16位架构相比,代码尺寸更小。LPC11A12FHN33的CPU工作频率最高可达50 MHz。模拟/混合信号子系统可通过软件从互连的数字和模拟外设进行配置。

sot865-3_3d
数据手册 (2)
名称/描述修改日期
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal (REV 1.1) PDF (2.6 MB) LPC11AXX_ZH_120 May 2016
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal (REV 4.0) PDF (1.8 MB) LPC11AXX30 Oct 2012
勘误表 (1)
名称/描述修改日期
Errata sheet LPC11Axx (REV 2.0) PDF (38.0 kB) ES_LPC11AXX17 Jan 2013
应用说明 (9)
名称/描述修改日期
AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN1124117 Mar 2014
In-Application Programming for the LPC11Axx (REV 1.0) ZIP (979.0 kB) AN1138713 Aug 2013
Using LPC11Axx EEPROM (with IAP) (REV 2.0) ZIP (147.0 kB) AN1107309 Aug 2013
Frequency counter using the analog comparator of the LPC11Axx (REV 1.0) ZIP (567.0 kB) AN1124209 Aug 2013
I2C secondary boot loader (REV 1.0) ZIP (661.0 kB) AN1125809 Aug 2013
How to implement the ROM I2C (REV 1.0) ZIP (890.0 kB) AN1124922 Jul 2013
SPI secondary boot loader (REV 1.0) ZIP (638.0 kB) AN1125722 Jul 2013
How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN1131822 Jul 2013
UUencoding for UART ISP (REV 1.0) PDF (139.0 kB) AN1122906 Jul 2012
用户指南 (2)
名称/描述修改日期
LPC11Axx User manual (REV 5.0) PDF (2.5 MB) UM1052723 Jan 2013
LPC11Axx User manual (REV 1.0) PDF (3.7 MB) UM10527_ZH28 Aug 2012
手册 (1)
名称/描述修改日期
NXP® 50 MHz, 32-bit Cortex TM-M0 MCUs LPC11A00 (REV 1.0) PDF (729.0 kB) 7501709201 Jun 2012
封装信息 (1)
名称/描述修改日期
plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 7 x 7 x 0.85 mm (REV 1.0) PDF (204.0 kB) SOT865-308 Feb 2016
支持信息 (1)
名称/描述修改日期
ADC design guidelines (REV 1.0) PDF (145.0 kB) TN0000909 May 2014
订购信息
型号状态内核Clock speed [max] (MHz)DMIPS闪存 (kB)RAM (kB)EEPROM (kB)GPIO以太网USBUSB (speed)USB (type)LCDCANUARTDAC (bits)I²CSPIADC sample rateI²SADC channelsADC (bits)Comparators定时器Timer (bits)SCTimer / PWMRTCPWMPackage nameTemperature rangeTemperature sensorIOHSupply voltage [min] (V)Supply voltage [max] (V)Product categoryDemoboard
LPC11A12FHN33/101ActiveCortex-M050164128110128101416; 32111HVQFN32-40 °C to +85 °C11.83.6OM13025
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
LPC11A12FHN33/101SOT865-3Tray, Bakeable, Single in DrypackActiveLPC11A12FHN33/101, (9352 939 75551)Standard MarkingLPC11A12FHN33/101Always Pb-free33
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal LPC11A14FHN33
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal LPC11A14FHN33
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash, 8 kB SRAM, 4 kB EEPROM; configurable analog/mixed-signal LPC11A14FHN33
Errata sheet LPC11Axx LPC11A14FHN33
AES encryption and decryption software on LPC microcontrollers LPC43S50FET256
In-Application Programming for the LPC11Axx LPC11A14JBD48
Using LPC11Axx EEPROM (with IAP) LPC11A14FHN33
Frequency counter using the analog comparator of the LPC11Axx LPC11A14FHN33
I2C secondary boot loader LPC1788FET208
How to implement the ROM I2C LPC11A14FHN33
SPI secondary boot loader LPC1788FET208
How to implement the PMBus software stack LPC43S50FET256
UUencoding for UART ISP LPC43S50FET256
LPC11Axx User manual LPC11A14FHN33
LPC11Axx User manual LPC11A14FHN33
NXP® 50 MHz, 32-bit Cortex TM-M0 MCUs LPC11A00 LPC11A14FHN33
ADC design guidelines LPC4333JET256
SOT865-3 LPC1347FHN33
NXQ1TXA1