LPC11U35FHI33: 64kB闪存、12kB SRAM、HVQFN32封装

LPC11U35FHI33是基于ARM Cortex-M0的低成本32位MCU,设计用于8位/16位微控制器应用,提供性能、低功率、简单指令集和内存寻址,与现有8位/16位架构相比,代码尺寸更小。LPC11U35FHI33的CPU工作频率最高可达50 MHz。LPC11U35FHI33配备了高度灵活且可配置的全速USB 2.0设备控制器,为当今的高要求连接解决方案带来了无与伦比的设计灵活性和无缝的集成度。

Outline 3d SOT617-3
数据手册 (1)
名称/描述修改日期
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up to 12 kB SRAM and 4 kB EEPROM; USB device; USART (REV 2.2) PDF (1.9 MB) LPC11U3X11 Mar 2014
勘误表 (1)
名称/描述修改日期
Errata sheet LPC11U3x (REV 3.0) PDF (41.0 kB) ES_LPC11U3X12 Aug 2014
应用说明 (10)
名称/描述修改日期
LPC11U3x/2x USB Secondary Bootloader (REV 1.2) ZIP (11.3 MB) AN1173215 Nov 2016
AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN1124117 Mar 2014
Guidelines for full-speed USB on NXP®'s LPC microcontrollers (REV 1.1) PDF (148.0 kB) AN1139220 Feb 2014
USB composite device on LPC11Uxx (REV 1.0) ZIP (1.9 MB) AN1123209 Aug 2013
I2C secondary boot loader (REV 1.0) ZIP (661.0 kB) AN1125809 Aug 2013
SPI secondary boot loader (REV 1.0) ZIP (638.0 kB) AN1125722 Jul 2013
USB In-System Programming with the LPC11U3X/LPC11U2X (REV 1.0) ZIP (1.4 MB) AN1130522 Jul 2013
How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN1131822 Jul 2013
Porting the CMSIS-DAP debugger to the Cortex-M0 platform (REV 1.0) ZIP (912.0 kB) AN1132122 Jul 2013
UUencoding for UART ISP (REV 1.0) PDF (139.0 kB) AN1122906 Jul 2012
用户指南 (1)
名称/描述修改日期
LPC11U3x/2x/1x User manual (REV 5.4) PDF (3.8 MB) UM1046201 Nov 2016
封装信息 (1)
名称/描述修改日期
DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm (REV 1.1) PDF (219.0 kB) SOT617-308 Jun 2016
包装 (1)
名称/描述修改日期
HVQFN32; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,518 or Y Ordering code... (REV 1.0) PDF (201.0 kB) SOT617-3_51801 Apr 2015
报告或演示文稿 (1)
名称/描述修改日期
Driving LPC11Uxx with EPSON Crystals (REV 1.0) PDF (210.0 kB) R_1007408 Oct 2015
支持信息 (1)
名称/描述修改日期
ADC design guidelines (REV 1.0) PDF (145.0 kB) TN0000909 May 2014
订购信息
型号状态内核Clock speed [max] (MHz)DMIPS闪存 (kB)RAM (kB)EEPROM (kB)GPIO以太网USBUSB (speed)USB (type)LCDCANUARTI²CSPIADC sample rateI²SADC channelsADC (bits)ComparatorsDAC (bits)定时器Timer (bits)SCTimer / PWMRTCPWMPackage nameTemperature rangeTemperature sensorIOHSupply voltage [min] (V)Supply voltage [max] (V)Product categoryDemoboard
LPC11U35FHI33/501ActiveCortex-M05064124261FSdevice112810416; 32111HVQFN32-40 °C to +85 °C1.83.6OM13032; OM13041; OM13033
LPC11U35FHI33/CP3337ActiveCortex-M0504264124261FSdevice1128102216; 32111HVQFN32-40 °C to +85 °C1.83.6OM13033; OM13041; OM13032
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
LPC11U35FHI33/501SOT617-3Tray, Bakeable, Single in DrypackActiveLPC11U35FHI33/501, (9352 972 59551)Standard MarkingLPC11U35FHI33/501Always Pb-free33
Reel 13" Q1/T1 in DrypackActiveLPC11U35FHI33/501Y (9352 972 59518)Standard MarkingLPC11U35FHI33/501Always Pb-free33
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up to 12 kB SRAM and 4 kB EEPROM; USB device; USART LPC11U37HFBD64
Errata sheet LPC11U3x LPC11U37HFBD64
LPC11U3x/2x USB Secondary Bootloader LPC11U37HFBD64
AES encryption and decryption software on LPC microcontrollers LPC43S50FET256
Guidelines for full-speed USB on NXP®'s LPC microcontrollers LPC1788FET208
USB composite device on LPC11Uxx LPC11U37FBD64
I2C secondary boot loader LPC1788FET208
SPI secondary boot loader LPC1788FET208
USB In-System Programming with the LPC11U3X/LPC11U2X LPC11U37FBD64
How to implement the PMBus software stack LPC43S50FET256
Porting the CMSIS-DAP debugger to the Cortex-M0 platform LPC11U37FBD64
UUencoding for UART ISP LPC43S50FET256
LPC11U3x/2x/1x User manual LPC11U68JBD64
Driving LPC11Uxx with EPSON Crystals LPC11U68JBD64
ADC design guidelines LPC4333JET256
SOT617-3 LPC11U35FHI33
Reel 13" Q1/T1 in Drypack LPC11U35FHI33
OL2381AHN