NB3V63143G: 1.8 V One Time Programmable OmniClock Generator with Single-Ended (LVCMOS) and Differential (LVDS/HCSL) Outputs with Individual Output Enable and Individual VDDO

The NB3V63143G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS) reference clock as input. It generates either three single ended (LVCMOS) outputs, or one single ended output and one differential (LVDS/HCSL) output. The output signals can be modulated using the spread spectrum feature of the PLL (programmable spread spectrum type, deviation and rate) for applications demanding low electromagnetic interference (EMI). Individual output enable pins OE[2:0] are available to enable/disable the outputs. Individual output voltage pins VDDO[2:0] are available to independently set the output voltage of each output. Up to four different configurations can be written into the device memory. Two selection pins (SEL[1:0]) allow the user to select the configuration to use. Using the PLL bypass mode, it is possible to get a copy of the input clock on any or all of the outputs. The device can be powered down using the Power Down pin (PD#). It is possible to program the internal input crystal load capacitance and the output drive current provided by the device. The device also has automatic gain control (crystal power limiting) circuitry which avoids the device overdriving the external crystal.

特性
  • Member of the OmniClock Family of Programmable Clock Generators
  • Operating Power Supply: 1.8 V ± 0.1 V
  • I/O Standards ♦ Inputs: LVCMOS, Fundamental Mode Crystal ♦ Outputs: 1.8 V LVCMOS ♦ Outputs: LVDS and HCSL
  • 3 Programmable Single Ended (LVCMOS) Outputs from 8 kHz to 200 MHz
  • 1 Programmable Differential Clock Output up to 200 MHz
  • Input Frequency Range ♦ Crystal: 3 MHz to 50 MHz ♦ Reference Clock: 3 MHz to 200 MHz
  • Configurable Spread Spectrum Frequency Modulation Parameters (Type, Deviation, Rate)
  • Individual Output Enable Pins
  • Independent Output Voltage Pins
  • Programmable Internal Crystal Load Capacitors
  • Programmable Output Drive Current for Single Ended Outputs
  • Power Saving Mode through Power Down Pin
  • Programmable PLL Bypass Mode
  • Programmable Output Inversion
  • Temperature Range −40°C to 85°C
  • These are Pb−Free Devices
应用
  • Consumer
  • Industrial Equipment
  • Computing & Peripherals
  • Portable equipment
终端产品
  • Smart Wearables
  • Smart Phones
  • Digital Cameras
  • Camcorders
  • Set Top Boxes
  • Printers
  • eBooks
  • Media Players
软件 (1)
Document TitleDocument ID/SizeRevisionRevision Date
Clock Cruiser Software v2.0.2Clock Cruiser Software v2.0.2 (24342kB)2.0.2Nov, 2016
封装图纸 (1)
Document TitleDocument ID/SizeRevision
QFN16 3x3, 0.5P485AE (32.1kB)C
仿真模型 (1)
Document TitleDocument ID/SizeRevisionRevision Date
NB3V63143G IBIS ModelNB3V63143G (50kB)0
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
1.8V Programmable OmniClock Generator with Single-Ended (LVCMOS) and Differential (LVDS/HCSL) Output with Individual Output Enable and Individual VDDONB3V63143G/D (271kB)2
评估板文档 (4)
Document TitleDocument ID/SizeRevisionRevision Date
NB3X6X1XXG16QFNEVK Bill of Materials ROHS CompliantNB3X6X1XXG16QFNEVK_BOM_ROHS.pdf (92kB)1
NB3X6X1XXG16QFNEVK SchematicNB3X6X1XXG16QFNEVK_SCHEMATIC.pdf (1380kB)1
NB3X6X1XXG16QFNEVK Test ProcedureNB3X6X1XXG16QFNEVK_TEST_PROCEDURE.pdf (230kB)0
NB3x6x1xxG16QFN OmniClock Evaluation Kit ManualEVBUM2308/D (1340kB)2Jul, 2016
评估板与开发工具
产品状况Compliance简短说明
NB3X6X1XXG16QFNEVKActivePb-freeOne Time Programmable Clock Generator Evaluation Kit for 16 lead QFN Package
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
NB3V63143G00MNR2GActivePb-free Halide freeQFN-16485AE1Tape and Reel3000联系BDTIC
订购产品技术参数
ProductInput LevelOutput LevelVS Typ (V)fin Typ (MHz)fout Typ (MHz)tJitter(Cy-Cy) Typ (ps)tJitter(Period) Typ (ps)tJitter(Φ) Typ (ps)tR & tF Typ (ps)tR & tF Max (ps)TA Min (°C)TA Max (°C)
NB3V63143G00MNR2GLVCMOS CrystalLVCMOS LVDS HCSL1.83 MHz to 200 MHz (Reference Clock) 3 MHz to 50 MHz (Crystal)0.008 to 2001001001000700-4085
1.8V Programmable OmniClock Generator with Single-Ended (LVCMOS) and Differential (LVDS/HCSL) Output with Individual Output Enable and Individual VDDO (271kB) NB3V63143G
Clock Cruiser Software v2.0.2 NB3V63143G
NB3V63143G IBIS Model NB3V63143G
NB3X6X1XXG16QFNEVK BOM ROHS NB3X6X1XXG16QFNEVK
NB3X6X1XXG16QFNEVK SCHEMATIC NB3X6X1XXG16QFNEVK
NB3X6X1XXG16QFNEVK TEST PROCEDURE NB3X6X1XXG16QFNEVK
EVBUM2308/D - 1340 KB NB3X6X1XXG16QFNEVK
QFN16 3x3, 0.5P NLAS4783B