NBC12430: PLL Synthesized Clock Generator, Programmable, 3.3 V / 5.0 V (50 to 800 MHz)

The NBC12430 and NBC12430A are a general purpose, PLL based synthesized clock sources. The VCO will operate over a frequency range of 400 MHz to 800 MHz. The VCO frequency is sent to the N-output divider, where it can be configured to provide division ratios of 1, 2, 4, or 8. The VCO and output frequency can be programmed using the parallel or serial interfaces to the configuration logic. Output frequency steps of 250 KHz, 500 KHz, 1.0 MHz, 2.0 MHz can be achieved using a 16 MHz crystal, depending on the output dividers settings. The PLL loop filter is fully integrated and does not require any external components. The NBC12430 is specified to operate across the commercial temperature range. The NBC12430A is specified to operate across the industrial temperature range.

特性

Best-in-Class Output Jitter Performance, ±20 ps Peak-to-Peak
50 MHz to 800 MHz Programmable Differential PECL Outputs
Fully Integrated Phase-Lock-Loop with Internal Loop Filter
Parallel Interface for Programming Counter and Output Dividers During Power-Up
Minimal Frequency Overshoot
Serial 3-Wire Programming Interface
Crystal Oscillator Interface
Operating Range: VCC = 3.135 V to 5.25 V
CMOS and TTL Compatible Control Inputs
Drop-in Replacement for Motorola MC12430
Pb-Free Packages are Available

应用

Clock generation and synthesis for computing and servers.

封装

应用注释 (11)

Document Title	Document ID/Size	Revision	Revision Date
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Designing with PECL (ECL at +5.0 V)	AN1406/D (105.0kB)	2
ECL Clock Distribution Techniques	AN1405/D (54.0kB)	1
Interfacing Between LVDS and ECL	AN1568/D (121.0kB)	11
Interfacing with ECLinPS	AND8066/D (72kB)	3
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks	AND8001/D (90.0kB)	0
Storage and Handling of Drypack Surface Mount Device	AND8003/D (49kB)	2	Mar, 2016
System Clock Generators	AND8248/D (110.0kB)	1
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
The ECL Translator Guide	AN1672/D (142.0kB)	12
Thermal Analysis and Reliability of WIRE BONDED ECL	AND8072/D (119.0kB)	5

封装图纸 (2)

Document Title	Document ID/Size	Revision
28 LEAD PLCC	776-02 (67.7kB)	F
QFN32, 5x5, 0.5P, 3.1x3.1EP	488AM (57.4kB)	A

仿真模型 (1)

Document Title	Document ID/Size	Revision	Revision Date
IBIS Model for NBC12430FN	NBC12430FN.IBS (27.0kB)	4

评估板文档 (2)

Document Title	Document ID/Size	Revision	Revision Date
NBC124XXEVB Evaluation Board User's Manual	EVBUM2090/D (1092.0kB)	4
NBC124XXEVB Gerber Layout Files (Zip Format)	NBC124XXEVB_GERBER.ZIP (597.0kB)	1

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
PLL Synthesized Clock Generator, 3.3 V / 5 V Programmable, (50 to 800 MHz)	NBC12430/D (243.0kB)	13

评估板与开发工具

产品	状况	Compliance	简短说明
NBC124XXEVB	Active		PLL Synthesized Clock Generator Evaluation Board

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
NBC12430AFAG	Active	Pb-free Halide free	LQFP-32	联系BDTIC	2	Tray JEDEC	250	联系BDTIC
NBC12430AFNG	Active	Pb-free Halide free	PLCC-28	776-02	3	Tube	37	$8.2665
NBC12430AMNG	Active	Pb-free Halide free	QFN-32	488AM	1	Tube	74	联系BDTIC
NBC12430FAG	Active	Pb-free Halide free	LQFP-32	联系BDTIC	2	Tray JEDEC	250	联系BDTIC
NBC12430FAR2G	Active	Pb-free Halide free	LQFP-32	联系BDTIC	2	Tape and Reel	2000	联系BDTIC
NBC12430FNG	Active	Pb-free Halide free	PLCC-28	776-02	3	Tube	37	$6.6665
NBC12430FNR2G	Active	Pb-free Halide free	PLCC-28	776-02	3	Tape and Reel	500	联系BDTIC

订购产品技术参数

Product	Input Level	Output Level	VS Typ (V)	fin Typ (MHz)	fout Typ (MHz)	tJitter(Cy-Cy) Typ (ps)	tJitter(Period) Typ (ps)	tR & tF Typ (ps)	tR & tF Max (ps)	TA Max (°C)
NBC12430AFAG	CMOS	ECL	5 3.3	10-100	50-800	±20	5	175	425	70
NBC12430AFNG	CMOS	ECL	3.3 5	10-100	50-800	±20	5	175	425	70
NBC12430AMNG	CMOS	ECL	5 3.3	10-100	50-800	±20	5	175	425	70
NBC12430FAG	CMOS	ECL	3.3 5	10-100	50-800	±20	5	175	425	70
NBC12430FAR2G	CMOS	ECL	3.3 5	10-100	50-800	±20	5	175	425	70
NBC12430FNG	CMOS	ECL	3.3 5	10-100	50-800	±20	5	175	425	70
NBC12430FNR2G	CMOS	ECL	5 3.3	10-100	50-800	±20	5	175	425	70