NBSG14: SiGe Clock / Data Fanout Buffer, 1:4 Differential, 2.5 V / 3.3 V, with RSECL Outputs

The NBSG14 is a 1-to-4 clock/data distribution chip, optimized for ultra-low skew and jitter.Inputs incorporate internal 50-ohm termination resistors and acceptNECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing ECL), 400 mV.

特性

Maximum Input Clock Frequency up to 12 GHz
Maximum Input Data Rate up to 12 Gb/s Typical
50 Ω Internal Input Termination Resistors
30 ps Typical Rise and Fall Times
125 ps Typical Propagation Delay
RSPECL Output with Operating Range: V = 2.375 V to 3.465 V with VEE = 0 V
RSNECL Output with RSNECL or NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
RSECL Output Level (400 mV Peak-to-Peak Output),
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices

终端产品

ATE Instrumentation, Networking

封装

应用注释 (12)

Document Title	Document ID/Size	Revision	Revision Date
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Board Mounting Considerations for FCBGA Packages	AND8075/D (56.0kB)	0
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)	AND8086/D (40.0kB)	0
Chips that Rip	AND8068/D (25.0kB)	0
Designing with PECL (ECL at +5.0 V)	AN1406/D (105.0kB)	2
ECL Clock Distribution Techniques	AN1405/D (54.0kB)	1
GigaComm (SiGe) SPICE Modeling Kit	AND8077/D (157kB)	6
Interfacing with ECLinPS	AND8066/D (72kB)	3
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks	AND8001/D (90.0kB)	0
Storage and Handling of Drypack Surface Mount Device	AND8003/D (49kB)	2	Mar, 2016
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
Thermal Analysis and Reliability of WIRE BONDED ECL	AND8072/D (119.0kB)	5

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
2.5 V/3.3 V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs	NBSG14/D (391kB)	17	Jun, 2014

仿真模型 (4)

Document Title	Document ID/Size	Revision
IBIS Model for NBSG14MN 3.3 V	NBSG14MN_33V.IBS (9.0kB)	2
IBIS Model for nbsg14mn 2.5V	NBSG14MN_25V.IBS (9.0kB)	2
IBS Model for NBSG14BA (2.5 V)	NBSG14BA_25V.IBS (9.0kB)	2
IBS Model for NBSG14BA (3.3 V)	NBSG14BA_33V.IBS (9.0kB)	4

封装图纸 (1)

Document Title	Document ID/Size	Revision
QFN16, 3x3, 0.5P	485G-01 (57.3kB)	F

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
NBSG14MNG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tube	123	联系BDTIC
NBSG14MNHTBG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	100	联系BDTIC
NBSG14MNR2G	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	3000	联系BDTIC

订购产品技术参数

Product	Type	Channels	Input / Output Ratio	Input Level	Output Level	VCC Typ (V)	tJitterRMS Typ (ps)	tskew(o-o) Max (ps)	tpd Typ (ns)	tR & tF Max (ps)	fmaxClock Typ (MHz)	fmaxData Typ (Mbps)
NBSG14MNG	Buffer	1	1:4	CML LVDS TTL CMOS ECL	ECL	2.5 3.3	0.2	15	0.125	55	12000	12000
NBSG14MNHTBG	Buffer	1	1:4	LVDS TTL CML CMOS ECL	ECL	2.5 3.3	0.2	15	0.125	55	12000	12000
NBSG14MNR2G	Buffer	1	1:4	LVDS TTL ECL CML CMOS	ECL	3.3 2.5	0.2	15	0.125	55	12000	12000