NCP51402: 3 Amp VTT Termination Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4

The NCP51402 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and low−noise systems where space is a key consideration. The NCP51402 maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The NCP51402 supports a remote sensing function and all power requirements for DDR VTT bus termination. The NCP51402 can also be used in low−power chipsets and graphics processor cores that require dynamically adjustable output voltages.

特性
  • Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails
  • PVCC Voltage Range: 1.1 to 3.5 V
  • Integrated Power MOSFETs
  • Fast Load−Transient Response
  • PGOOD − Logic output pin to Monitor VTT Regulation
  • VRI − Reference Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
  • EN − Logic input pin for Shutdown mode
  • Built−in Under Voltage Lockout and Over Current Limit
应用
  • DDR Memory Termination
  • Servers and Networking equipment
  • Graphics Processor Core Supplies
  • Chipset/RAM Supplies as Low as 0.5 V
终端产品
  • Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers
  • Desktop PC’s, Notebooks, and Workstations
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
3 Amp VTT Termination Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4NCP51402/D (336kB)1May, 2016
封装图纸 (1)
Document TitleDocument ID/SizeRevision
DFN10, 3x3, 0.5P506CL (55.8kB)O
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
NCP51402MNTXGActivePb-free Halide freeDFN-10506CL1Tape and Reel3000$0.3
订购产品技术参数
ProductIOUT VTT Max (A)IQ Typ (µA)VCC Bias Min (V)VCC Bias Max (V)Remote SensePower Good
NCP51402MNTXG37002.3755.5YesYes
3 Amp VTT Termination Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4 (336kB) NCP51402
DFN10, 3x3, 0.5P NCP81178