| 下载文件 |
|---|
| R5F56519EDLJ.pdf |
| Product Status | 研发中 |
|---|---|
| Family | RX |
| Series | RX600 |
| Group | RX651 |
| Program memory | 1024 KB Flash memory |
|---|---|
| RAM | 256 KB |
| CPU | RXv2 (32-bit) |
|---|---|
| Max. Frequency | 120 MHz |
| Sub-Clock (32.768 kHz) | YES |
| On-chip Oscillator Freq. | 16/18/20MHz, Low Speed Oscillator 240 KHz,For IWDT 120KHz |
| PLL | YES |
| Real-Time Clock (RTC) | YES |
| Power-On Reset | YES |
| Low Voltage Detection | YES |
| Floating Point Unit | YES |
| DMA Remarks | DMAC x 8ch, EXDMAC x 2ch, DTC |
| External Address/Data Bus | YES |
| External Interrupt Pins | 16 |
| I/O Ports | 79 |
| 8-bit Timers | 4 ch |
|---|---|
| 16-bit Timers | 18 ch |
| 32-bit Timers | 3 ch |
| Watchdog Timers | 2 ch |
| PWM Output | 48 |
| 3-Phase PWM Output Function | YES |
| A/D Converters | 12-bit x 22 ch |
|---|---|
| D/A Converters | 12-bit x 1 ch |
| CAN | 2 ch |
|---|---|
| USB Ports | 1 |
| USB Host | YES |
| USB Peripheral | YES |
| USB Remarks | USB2.0 Full Speed & USB OTG (On-The-Go) Support |
| CSIs | 11 ch |
| SPIs | 14 ch |
| UARTs | 11 ch |
| I2Cs | 13 ch |
| Serial Interface Remarks | QSPI, FIFO(2ch) |
| Operating Voltage | 2.7 to 3.6 V |
|---|---|
| Operating Temperature | -40 to 85 ℃ (Ambient Temperature) |
| Remarks | AES, RNG/-/- |
|---|
| Pins | 100 |
|---|---|
| Terminal pitch (mm) | 0.65 mm |
| Package Type | TFLGA |
| Dimensions (mm) | 7x7 mm2 |
| Drawing Link | ptlg0100ja_a |
| Mount pad | fig0013e |
| Mounting height (mm)[MAX] | 1.05 mm |
| Mass (g) [TYP,] | 0.1 g |
| Renesas code | PTLG0100JA-A (old: 100F0G ) |
| JEITA code | P-TFLGA100-7x7-0.65 |
| Packing | Tray |
| Terminal material - Base | Cu alloy |
| Terminal material - Surface | Ni/Au |
