RH850 Multicore Model-Based Environment [Embedded Target for RH850 Multicore] (Under Development)
![Graphical display of the states of execution for each core in sub-system units of Simulink models
Acquisition of execution times in sub-system units at the time of simulation through the debugger of CS+.
Graphical display of the states of execution for each core in sub-system units
⇒ The allowable margins for processing, for which the worst execution timespans during simulation are going to be the control periods, can be checked.
Automatically finds the best allocations of cores for complex innovative control systems then parallelizes them.
Automatically finds the best core allocations for control systems in cooperation with the MBP tool from eSOL Co., Ltd.
⇒ This makes it possible to compare and examine which software structures make effective use of the capacity of the multiple cores directly on MATLAB and Simulink models.
Automatically generates parallel source code and provides visualization of the performance of multiple cores during modelling
Automatically generates multicore code and PILS environments in several tens of seconds from control models(Note)
⇒ Returning to earlier stages in design due to incorrect estimation of parallel performance before implementing software can be avoided, and the development times for multicore control software can be shortened.
Note
Results in this range were for Simulink models with a scale of thousands of blocks in a study of model-based parallelization at Nagoya University.](/image/renesas/embedded-target-for-rh850-multicore-overview.png)
The Embedded Target for RH850 Multicore is a RH850 model-based multicore environment that simplifies complex driving control for the autonomous-driving era. In addition to the multicore support of the PILS(Note) tool for automatic configuration of environments, Embedded Target for Renesas CS+, it can also be interlinked with a model-based parallelization tool from eSOL Co., Ltd.
The Embedded Target for RH850 Multicore generates parallel code for multicore RH850 devices through the implementation phase of a Simulink® model from The MathWorks®, Inc. It contributes to innovative automotive control systems for “eco-cars” (fuel economy and CO2 regulation) and to enhanced safety through the evaluation of functionality and performance in the flow of development.
Note
PILS: Processor In the Loop Simulation
文档资料
- [Notes] CS+ Code Generator for RL78 (CS+ for CC), CS+ Code Generator for RL78 (CS+ for CA, CX), e² studio Code Generator Plug-in, Applilet3 Coding Assistance Tool for RL78.pdf {219KB}
- [Notes] CS+ Code Generator for RX, e² studio Code Generator Plug-in, AP4 Coding Assistance Tool for RX.pdf {111KB}
- [Notes] CS+ Integrated Development Environment.pdf {110KB}
- [New release] The E2 Emulator, a New On-Chip Debugging Emulator.pdf {129KB}
- [Notification] Debugging Console Function of the RX MCUs Using On-chip Emulators: E2 Emulator Lite, E1, or E20.pdf {187KB}
- [Upgrade to revision] C Source Code Converters, CcnvCA78K0R, CcnvCA78K0, CcnvNC30.pdf {235KB}
- CS+ RL78 Compiler CC-RL V1.04.00 Release Note.pdf {209KB}
- List of Functions Supported by CS+.pdf {248KB}
- [Notes] C Compiler Package for RL78 Family.pdf {233KB}
- [Notes] CS+ Integrated Development Environment.pdf {145KB}
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