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ST10R167-Q：16B ROMLESS MCU

The ST10R167 is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 12.5 million instructions per second) with high peripheral functionality and enhanced I/O capabilities.

It also provides on-chip high-speed RAM and clock generation via PLL.

Key Features

• Clock generation\t\tOn-chip PLL\t\tDirect or prescaled clock input\t\t
• On-chip bootstrap loader
• Idle and power down modes\t\tIdle Current <95mA\t\tPower-down supply current <400μA\t\t
• Up to 111 general purpose I/O lines\t\tIndividually programmable as input, output or special function\t\tProgrammable drive strengthProgrammable threshold (hysteresis)
• Serial channels\t\tSynchronous/async serial channel\t\tHigh-speed synchronous channel\t\t
• 4-Channel PWM Unit
• 144-Pin PQFP package
• Development support\t\tC-compilers, macro-assembler packages, emulators, eval boards, HLL-debuggers, simulators, logic analyzer disassemblers, programming boards\t\t
• Fail-safe protection\t\tProgrammable watchdog timer\t\tOscillator Watchdog\t\t
• A/D converter\t\t16-channel 10-bit.\t\t7.76μs conversion time\t\t
• High performance CPU\t\t16-bit CPU with 4-stage pipeline\t\t80ns instruction cycle time @ 25MHz clk\t\t400ns 16 x 16-bit multiplication\t\t800ns 32/16-bit division\t\tEnhanced boolean bit manipulation facilities\t\tAdditional instructions to support HLL and operating systems\tSingle-cycle context switching support\t\t
• Fast and flexible bus\t\tProgrammable external bus characteristics for different address ranges\t\t8-Bit or 16-bit external data bus\t\tMultiplexed or demultiplexed external address/data buses\t\tFive programmable chip-select signals\t\tHold-acknowledge bus arbitration support\t\t
• Memory organization\t\tUp to 16 MBytes linear address space for code and data (5 MByte with CAN)\t\t2KByte on-chip internal RAM (IRAM)\t\t2KByte on-chip extension RAM (XRAM)\t\t
• Timers\t\tTwo multi-functional general purpose timer units with 5 timers\t\tTwo 16-channel capture/compare units\t\t
• On-chip CAN 2.0b interface
• Interrupt\t\t8-channel peripheral event controller for single cycle, interrupt driven data transfer\t\t16-priority-level interrupt system with 56 sources, sample-rate down to 40 ns\t\t

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