STM6520:Dual push-button smart reset with push-button controlled output delay

The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset™ input delay time (tSRC) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button.

This reset configuration provides versatility and allows the application to discriminate between a software generated interrupt and a hard system reset. When the input push-buttons are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-buttons closed for the extended setup time tSRCcauses a hard reset of the processor through the reset outputs.

The STM6520 has two combined delayed Smart Reset™ inputs (SR0, SR1) with two user-selectable delayed Smart Reset™ setup time (tSRC) options of 7.5 s and 12.5 s typ., selected by a dual-state Smart Reset™ DSR input pin. When DSR is connected to ground, tSRC= 7.5 s, when connected to VCC, tSRC= 12.5 s (typ.). There are two reset outputs, both going active simultaneously after both of the Smart Reset™ inputs were held active for the selected tSRC delay time. The outputs remain asserted until either or both inputs go to inactive logic level (for this device the output reset pulse duration is fully push-button controlled, meaning neither fixed nor minimum reset pulse width, nor power-on reset pulse is implemented). The first reset output, RST1, is active-low, open-drain; the second reset output, RST2, is active-high, push-pull. The device fully operates over a broad VCC range 1.65 to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V.

Key Features

  • Dual Smart Reset™ push-button inputs, with user-selectable extended reset setup delay (by two-state input logic): tSRC = 6, 10 s (min.)
  • Push-button controlled reset pulse duration (no fixed nor minimum pulse width guaranteed)
  • No power-on reset
  • Dual reset outputs
    • RST1- active-low, open-drain
    • RST2 - active-high, push-pull
  • Fixed Smart Reset™ input logic voltage levels
  • Broad operating voltage range 1.65 V to 5.5 V, inactive reset output levels valid down to 1.0 V
  • Low supply current 1.5 μA
  • Operating temperature: –30 °C to +85 °C
  • TDFN8 package: 2 mm x 2 mm x 0.75 mm
  • RoHS compliant
产品规格
DescriptionVersionSize
DS6371: Dual push-button Smart ResetTM with push-button controlled output delay6.1254 KB
应用手册
DescriptionVersionSize
AN3261: Dual push-button Smart Reset™ devices with user-adjustable setup delays1.1630 KB
Technical Notes & Articles
DescriptionVersionSize
TN0941: Reset and supervisor ICs: frequently asked questions (FAQ)1.0328 KB
简报
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Health and Wellness Mobility Cloud computing1 MB
ST offering in Wearable - Analog and Mixed Signal Portfolio3.01 MB
宣传册
DescriptionVersionSize
Resets and supervisors - portfolio overview1.01 MB
Smart Reset ICs dual push-button1.0767 KB
手册
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ST’s solutions for mobile devices3.23 MB
样片和购买
型号PackagePacking TypeReset pulse width (mS) (min)Reset pulse width (mS) (max)Operating Temperature (°C) (min)Unit Price (US$) *QuantityOperating Temperature (°C) (max)ECCN (EU)ECCN (US)Country of Origin
STM6520AQRRDG9FDFN8 2x1x0.55Tape And Reel---300.39100085NECEAR99MALAYSIA
质量和可靠性
型号PackageGradeRoHS Compliance GradeMaterial Declaration**
STM6520AQRRDG9FDFN8 2x1x0.55IndustrialEcopack3md_xp-wspc-mlpddfn-wspc-2x2x0.75-wspc-8l-wspc-pitch-wspc-0.5_ezdgr6badrm-wspc-(stm6520aqrrdg9f)_wcp_ver2_signed.pdf
md_xp-wspc-mlpddfn-wspc-2x2x0.75-wspc-8l-wspc-pitch-wspc-0.5_ezdgr6badrm-wspc-(stm6520aqrrdg9f)_wcp_ver2.xml
Dual push-button Smart ResetTM with push-button controlled output delay STM6520
circuit_diagram_15953_thumbnail.png STM6520
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md_xp-wspc-mlpddfn-wspc-2x2x0.75-wspc-8l-wspc-pitch-wspc-0.5_ezdgr6badrm-wspc-(stm6520aqrrdg9f)_wcp_ver2_signed.pdf STM6520
md_xp-wspc-mlpddfn-wspc-2x2x0.75-wspc-8l-wspc-pitch-wspc-0.5_ezdgr6badrm-wspc-(stm6520aqrrdg9f)_wcp_ver2.xml STM6520