AD6672 IF Receiver

The AD6672 is an 11-bit intermediate receiver with sampling speeds of up to 250 MSPS. The AD6672 is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired.

The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The ADC core output is connected internally to a noise shaping requantizer (NSR) block. The device supports two output modes that are selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6672 supports enhanced SNR performance within a limited region of the Nyquist bandwidth while maintaining an 11-bit output resolution. The NSR block is programmed to provide a bandwidth of up to 33% of the sample clock. For example, with a sample clock rate of 250 MSPS, the AD6672 can achieve up to 73.6 dBFS SNR for an 82 MHz bandwidth at 185 MHz fIN.

With the NSR block disabled, the ADC data is provided directly to the output with an output resolution of 11 bits. The AD6672 can achieve up to 66.6 dBFS SNR for the entire Nyquist bandwidth when operated in this mode.

APPLICATIONS
  • Communications
  • Diversity radio and smart antenna (MIMO) systems
  • Multimode digital receivers (3G) WCDMA, LTE, CDMA2000 WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • General-purpose software radios
Features and Benefits
  • 11-bit, 250MSPS output data rate
  • Performance with NSR enabled
    SNR: 75.2 dBFS in a 55 MHz band to 185 MHz at 250 MSPS

    SNR: 72.8 dBFS in an 82 MHz band to 185 MHz at 250 MSPS
  • Performance with NSR disabled
    SNR: 66.4 dBFS up to 185 MHz at 250 MSPS

    SFDR: 87 dBc up to 185 MHz at 250 MSPS
  • Total power consumption:
    358 mW at 250 MSPS
  • 1.8 V supply voltages
  • LVDS (ANSI-644 levels) outputs
  • Integer 1-to-8 input clock divider (625 MHz maximum input)
  • Internal ADC voltage reference
  • Flexible analog input range
    1.4 V p-p to 2.0 V p-p
    (1.75 V p-p nominal)
  • Differential analog inputs with 350 MHz bandwidth
  • Serial port control
  • Energy saving power-down modes
  • User-configurable, built-in self test (BIST) capability
RF & Microwave
Analog to Digital Converters
Communications
    AD6672 IBIS Model
    Data Sheets
    Documentnote
    AD6672: IF Receiver Data Sheet (Rev. C)PDF 1490 kB
    Application Notes
    Documentnote
    AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
    AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
    AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
    AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
    AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
    AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
    AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
    AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
    AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
    AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
    AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
    AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0)PDF 356 kB
    User Guides
    Documentnote
    UG-386: Evaluating the AD9642/AD9634/AD6672 Analog-to-Digital ConvertersPDF 3293 kB
    AD6672 Quick Start GuidePDF 165 kB
    Technical Books
    Documentnote
    Order Information
    Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
    AD6672BCPZ-250 Production32 ld LFCSP (5x5x.75mm) w/3.6exposed padOTH 490-40 to 85C5244.2Y
    AD6672BCPZRL7-250 Production32 ld LFCSP (5x5x.75mm) w/3.6exposed padREEL 1500-40 to 85C5244.2Y
    Evaluation Boards
    Part NumberDescriptionPriceRoHS
    AD6672-250EBZEvaluation Board300Y
    AD9642-170EBZEvaluation Board300Y
    AD9642-210EBZEvaluation Board300Y
    AD9642-250EBZEvaluation Board300Y
    Reference Materials
    AD6672: IF Receiver Data Sheet (Rev. C) ad6672
    AD6672BCPZ (All Speed Grades) ad6672
    AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
    AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
    AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
    AN-282: Fundamentals of Sampled Data Systems ad1674
    AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
    AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
    AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
    AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
    AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
    AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
    AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
    AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
    AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
    AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
    AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
    AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
    AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
    AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
    AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
    AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
    AN-803: 利用引脚兼容高速ADC简化设计任务 (Rev. 0) ad6672
    AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0) ad6672
    AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
    UG-386: Evaluating the AD9642/AD9634/AD6672 Analog-to-Digital Converters ad6672
    AD6672 Quick Start Guide ad6672
    MT-031: 实现数据转换器的接地并解开AGND和DGND的谜团 ad6672
    MT-002: 奈奎斯特准则对数据采样系统设计有何意义 ad6672
    MT-001: 揭开公式(SNR = 6.02N + 1.76dB)的神秘面纱 ad6672
    MT-075: Differential Drivers for High Speed ADCs Overview ad6672
    MS-2210：高速ADC的电源设计 ad9861
    MS-1779：九项常被忽略的ADC技术规格 ad6672
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