AD9229 Quad 12-Bit, 50/65 MSPS, Serial LVDS A/D Converter

Digital beam forming systems for ultrasound Wireless and wired broadband communications Communication test equipment

The AD9229 is a 50 or 65 MSPS quad 12-bit, analog–to–digital converter with serial LVDS outputs. An on–chip track–and–hold circuit is designed for low cost, low power, small size and ease of use. The product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance where a small package size is critical.

The ADC requires a single +3 V power supply. No external reference or driver components are required for many applications. A separate output power supply pin supports LVDS compatible serial digital output levels.

The ADC automatically multiplies up the sample rate clock for the appropriate LVDS serial data rate. This data clock output (DCO) provides operation up to 390 MHz and supports double-data rate operation (DDR). An MSB trigger or Frame clock is also provided to signal a new output byte. Power down is supported, and the ADC consumes 3 mW when enabled.

Fabricated on an advanced CMOS process, the AD9229 is available in a 48-pin chip scale 7 mm x 7 mm package (48-LFCSP) specified over the industrial temperature range (–40°C to +85°C).

Applications

Features and Benefits

Four ADCs in one package
Small footprint: 7 mm x 7 mm chip scale package
Serial LVDS digital output data rates up to
780 Mbps (ANSI-644)
Data and Frame clock output provided
SNR = 69.5 dB (to Nyquist)
400 MHz full power analog bandwidth

Power dissipation = 246 mW per ADC at
50 MSPS
Excellent Linearity:
- DNL = ±0.3 LSB (typical)
- INL = ±0.4 LSB (typical)
1 V pp – 2 V pp input voltage range
+3.0 V supply operation
Power down mode

Analog to Digital Converters

AD9229 IBIS Models

AD9229BST (All Speed Grades) .IBS

Data Sheets

Document	note
AD9229: Quad, 12-Bit, 50/65 MSPS, Serial LVDS 3 V A/D Converter Data Sheet (Rev. B)	PDF 785 kB

Application Notes

Document	note
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)	PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)	PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)	PDF 227 kB
AN-282: Fundamentals of Sampled Data Systems	PDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)	PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)	PDF 203 kB
AN-345: Grounding for Low-and-High-Frequency Circuits	PDF 455 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)	PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)	PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)	PDF 373 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)	PDF 1535 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)	PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)	PDF 1679 kB

Order Information

Part Number	Package	Packing Qty	Temp Range	Price 100-499	Price 1000+	RoHS
AD9229ABCPZ-50 Production	48 ld LFCSP (7x7x.85 w/5.5mm EP)	OTH 260	-40 to 85C	40.46	34.41	Y
AD9229ABCPZ-65 Production	48 ld LFCSP (7x7x.85 w/5.5mm EP)	OTH 260	-40 to 85C	52.36	44.53	Y
AD9229ABCPZRL7-50 Obsolete	48 ld LFCSP (7x7x.85 w/5.5mm EP)	REEL 750		0	0	Y
AD9229ABCPZRL7-65 Obsolete	48 ld LFCSP (7x7x.85 w/5.5mm EP)	REEL 750		0	0	Y