AD9235 12-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter

A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that can be used with the most significant bit to determine low or high overflow. Fabricated on an advanced CMOS process, the AD9235 is available in a 28-lead thin shrink small outline package (TSSOP) and a 32-lead chip scale package (LFCSP) and is specified over the industrial temperature range (-40°C to +85°C).

The AD9235 is a family of monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS analog-to-digital converters. This family features a high performance sample-and-hold amplifier (SHA) and voltage reference. The AD9235 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available analog-to-digital converters, the AD9235 is suitable for applications in communications, imaging, and medical ultrasound.

A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that can be used with the most significant bit to determine low or high overflow.

Fabricated on an advanced CMOS process, the AD9235 is available in a 28-lead thin shrink small outline package (TSSOP) and a 32-lead chip scale package (LFCSP) and is specified over the industrial temperature range (-40°C to +85°C).

Features and Benefits
  • Single +3 V Supply Operation (2.7 V to 3.6 V)
  • SNR = 70 dBc to Nyquist at 65 MSPS
  • SFDR = 85 dBc to Nyquist at 65 MSPS
  • Low Power: 300 mW at 65 MSPS
  • On-Chip Reference and SHA
  • Differential Input with 500 MHz Bandwidth
  • DNL of ±0.4 LSB
  • Flexible Analog Input: 1 V p-p to 2 V p-p
  • Offset Binary or Twos Complement Data Format
  • Clock Duty Cycle Stabilizer
  • Pin out Migration to Either AD9215, AD9236, AD9245
Analog to Digital Converters
AD9235 IBIS Models
Data Sheets
Documentnote
AD9235: 12-Bit, 20/40/65 MSPS 3 V A/D Converter Data Sheet (Rev. D)PDF 1328 kB
Application Notes
Documentnote
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0)PDF 356 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9235BCPZ-20 Production32 ld LFCSP (5x5mm)OTH 490-40 to 85C8.347.08Y
AD9235BCPZ-40 Production32 ld LFCSP (5x5mm)OTH 490-40 to 85C9.417.99Y
AD9235BCPZ-65 Production32 ld LFCSP (5x5mm)OTH 490-40 to 85C14.2912.14Y
AD9235BCPZRL7-20 Production32 ld LFCSP (5x5mm)REEL 1500-40 to 85C07.08Y
AD9235BCPZRL7-40 Production32 ld LFCSP (5x5mm)REEL 1500-40 to 85C07.99Y
AD9235BCPZRL7-65 Obsolete32 ld LFCSP (5x5mm)REEL 150000Y
AD9235BRUZ-20 Production28 ld TSSOP (4.4mm)OTH 50-40 to 85C8.347.08Y
AD9235BRUZ-40 Production28 ld TSSOP (4.4mm)OTH 50-40 to 85C9.417.99Y
AD9235BRUZ-65 Production28 ld TSSOP (4.4mm)OTH 50-40 to 85C14.2912.14Y
AD9235BRUZRL7-20 Production28 ld TSSOP (4.4mm)REEL 1000-40 to 85C07.08Y
AD9235BRUZRL7-40 Production28 ld TSSOP (4.4mm)REEL 1000-40 to 85C07.99Y
AD9235BRUZRL7-65 Production28 ld TSSOP (4.4mm)REEL 1000-40 to 85C012.14Y
Reference Materials
AD9235: 12-Bit, 20/40/65 MSPS 3 V A/D Converter Data Sheet (Rev. D) ad9235
AD9235 (Valid for Both BRU and BCP Packages and All Speed Grades) ad9235
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-803: 利用引脚兼容高速ADC简化设计任务 (Rev. 0) ad6672
AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0) ad6672
AN-715: 走近IBIS模型:什么是IBIS模型?它们是如何生成的? (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
向应用工程师提问—36 宽带A/D 转换器的前端设计考虑因素II: 用放大器还是变压器来驱动ADC? ad8350
Ultrasound System Considerations and their Impact on Front-End Components ad600
MS-2210:高速ADC的电源设计 ad9861