AD9248 Dual 14-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter

The wide bandwidth, differential SHA allows for a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for various applications including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at frequencies well beyond the Nyquist rate. The AD9248 is suitable for applications in communications, imaging and medical ultrasound. Dual single-ended independent clock inputs are used to control all internal conversion cycles. A Duty Cycle Stabilizer (DCS) is available on the AD9248-65 and can compensate for wide variations in the clock duty cycle, allowing the converters to maintain excellent performance. The digital output data is presented in either straight binary or twos complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow. Fabricated on an advanced CMOS process, the AD9248 is available in a space saving 64-pin LQFP and is pin compatible to the AD9238. It is specified over the industrial temperature range (-40°C to +85°C). Applications Ultrasound equipment Direct conversion or IF sampling receivers WB-CDMA, CDMA2000,WiMAX Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes

The AD9248 is a dual, 3 V, 14-bit, 20/40/65 MSPS analog to digital converter. It features dual high performance sample-and-hold amplifiers and an integrated voltage reference. The AD9248 uses a multistage differential pipelined architecture with output error correction logic to provide 14-bit accuracy and guarantee no missing codes over the full operating temperature range at up to 65 MSPS data rates.

The wide bandwidth, differential SHA allows for a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for various applications including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at frequencies well beyond the Nyquist rate. The AD9248 is suitable for applications in communications, imaging and medical ultrasound.

Dual single-ended independent clock inputs are used to control all internal conversion cycles. A Duty Cycle Stabilizer (DCS) is available on the AD9248-65 and can compensate for wide variations in the clock duty cycle, allowing the converters to maintain excellent performance. The digital output data is presented in either straight binary or twos complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow.

Fabricated on an advanced CMOS process, the AD9248 is available in a space saving 64-pin LQFP and is pin compatible to the AD9238. It is specified over the industrial temperature range (-40°C to +85°C).

Features and Benefits
  • Integrated Dual 14-Bit Analog-to-Digital Converters
  • Single 3 V Supply Operation (2.7 V to 3.6 V)
  • SNR = 71.6 dBc (to Nyquist, AD9248-65)
  • SFDR = 80 dBc (to Nyquist, AD9248-65)
  • Low Power: 300 mW at 65 MSPS
  • Differential Input with 500 MHz 3 dB Bandwidth
  • Exceptional Cross Talk Immunity > 85 dB
  • On-Chip Reference and SHA
  • Flexible Analog Input: 1 Vp-p to 2 Vp-p Range
  • Offset Binary or Twos Complement Data Format
  • Clock Duty Cycle Stabilizer
  • Output datamux option
Analog to Digital Converters
AD9248 IBIS Models
Reference Designs
Data Sheets
Documentnote
AD9248: 14-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter Data Sheet (Rev. B)PDF 1719 kB
ADW12001: 14-Bit, 40 MSPS Dual Analog-to-Digital Converter Data Sheet (Rev. 0)PDF 662 kB
Application Notes
Documentnote
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0)PDF 356 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9248BCPZ-20 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)OTH 260-40 to 85C22.3218.98Y
AD9248BCPZ-40 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)OTH 260-40 to 85C28.2824.04Y
AD9248BCPZ-65 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)OTH 260-40 to 85C35.1329.85Y
AD9248BCPZRL-20 Obsolete64 ld LFCSP (9x9mm, 4.70mm exposed pad)REEL 250000Y
AD9248BCPZRL-40 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)REEL 2500-40 to 85C024.04Y
AD9248BCPZRL-65 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)REEL 2500-40 to 85C029.85Y
AD9248BSTZ-20 Production64 ld LQFP (7x7mm)OTH 250-40 to 85C22.3218.98Y
AD9248BSTZ-40 Production64 ld LQFP (7x7mm)OTH 250-40 to 85C28.2824.04Y
AD9248BSTZ-65 Production64 ld LQFP (7x7mm)OTH 250-40 to 85C35.1329.85Y
AD9248BSTZRL-20 Production64 ld LQFP (7x7mm)REEL 2000-40 to 85C00Y
AD9248BSTZRL-40 Obsolete64 ld LQFP (7x7mm)REEL 200000Y
AD9248BSTZRL-65 Obsolete64 ld LQFP (7x7mm)REEL 200000Y
ADW12001BCPZRL-40 Production64 ld LFCSP (9x9mm, 4.70mm exposed pad)REEL 2500-40 to 85C00Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9248BCP-65EBZEvaluation Board-1Y
AD9248BST-65EBZEvaluation Board-1Y
Reference Materials
AD9248: 14-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter Data Sheet (Rev. B) ad9248
ADW12001: 14-Bit, 40 MSPS Dual Analog-to-Digital Converter Data Sheet (Rev. 0) ad9248
AD9248BCP-20,-40,-65 (LFCSP, All Speed Grades) ad9248
CN0320 设计和集成文件 adrf6510
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-803: 利用引脚兼容高速ADC简化设计任务 (Rev. 0) ad6672
AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev. 0) ad6672
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
CN-0320：基于IQ解调器，具有中频和基带可变增益以及可编程基带滤波功能的中频至基带接收机 adrf6510
MS-2210：高速ADC的电源设计 ad9861
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