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AD9268 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

The AD9268 is a dual, 16-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9268 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired. On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9258, allowing a simple migration from 16 bits to 14 bits. The AD9268 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The ADC output data can be routed directly to the two external 16-bit output ports. These outputs can be set to either 1.8 V CMOS or LVDS.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.

The AD9268 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

Product Highlights

• On-chip dither option for improved SFDR performance with low power analog input.
• Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.
• Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.
• Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.
• Pin compatibility with the AD9258, allowing a simple migration from 16 bits to 14 bits. The AD9268 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.

Applications

• Communications
• Diversity radio systems
• Multimode digital receivers (3G)   GSM, EDGE, W-CDMA, LTE,   CDMA2000, WiMAX, TD-SCDMA
• I/Q demodulation systems
• Smart antenna systems
• General-purpose software radios
• Broadband data applications
• Ultrasound equipment

Data Sheets

Application Notes

User Guides

Order Information

Evaluation Boards

Reference Materials

• Solutions Bulletins & Brochures：Test & Instrumentation Solutions Bulletin, Volume 10, Issue 3
• Circuit Notes：CN-0171
• Technical Articles：MS-2210: Designing Power Supplies for High Speed ADC